Microchip Technology dsPIC33 series - Register 3-19: C1 RXOVIFH: CAN Receive Overflow Interrupt Status Register High; Register 3-20: C1 RXOVIFL: CAN Receive Overflow Interrupt Status Register Low

dsPIC33/PIC24 Family Reference Manual
DS70005340A-page 24  2018 Microchip Technology Inc.
Register 3-19: C1RXOVIFH: CAN Receive Overflow Interrupt Status Register High
(1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
RFOVIF<31:24>
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
RFOVIF<23:16>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 RFOVIF<31:16>: Receive FIFO Overflow Interrupt Pending bits
1 = Interrupt is pending
0 = Interrupt is not pending
Note 1: C1RXOVIFH: FIFO: RFOVIFx (flag needs to be cleared in the FIFO register).
Register 3-20: C1RXOVIFL: CAN Receive Overflow Interrupt Status Register Low
(1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
RFOVIF<15:8>
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 U-0
RFOVIF<7:1>
—
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-1 RFOVIF<15:1>: Receive FIFO Overflow Interrupt Pending bits
1 = Interrupt is pending
0 = Interrupt is not pending
bit 0 Unimplemented: Read as ‘0’
Note 1: C1RXOVIFL: FIFO: RFOVIFx (flag needs to be cleared in the FIFO register)