Microchip Technology dsPIC33 series - Register 3-21: C1 TXIFH: CAN Transmit Interrupt Status Register High; Register 3-22: C1 TXIFL: CAN Transmit Interrupt Status Register Low

 2018 Microchip Technology Inc. DS70005340A-page 25
CAN FD Protocol Module
Register 3-21: C1TXIFH: CAN Transmit Interrupt Status Register High
(1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TFIF<31:24>
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TFIF<23:16>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 TFIF<31:16>: Transmit FIFO/TXQ Interrupt Pending bits
1 = One or more enabled transmit FIFO/TXQ interrupts are pending
0 = No enabled transmit FIFO/TXQ interrupts are pending
Note 1: C1TXIFH: FIFO: TFIFx = ‘or’ of the enabled TX FIFO flags (flags need to be cleared in the FIFO register).
Register 3-22: C1TXIFL: CAN Transmit Interrupt Status Register Low
(1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TFIF<15:8>
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TFIF<7:0>
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 TFIF<15:0>: Transmit FIFO/TXQ Interrupt Pending bits
(2)
1 = One or more enabled transmit FIFO/TXQ interrupts are pending
0 = No enabled transmit FIFO/TXQ interrupts are pending
Note 1: C1TXIFL: FIFO: TFIFx = ‘or’ of the enabled TX FIFO flags (flags need to be cleared in the FIFO register).
2: TFIF0 is for the TXQ.