Mitsubishi Electric MELSEC iQ-R Series - Project Diversion; Module Control with Rnmtcpu

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2. DETAILS OF MIGRATION FROM Q17nCPUN(-T) TO RnMTCPU
2.4 Project Diversion
2.4.1 Module control with RnMTCPU
(1) Multiple CPU setting
Multiple CPU settings for Qn(H)CPU and Q17nCPUN(-T), which are set in
MELSOFT GX Works2 and MELSOFT MT Developer2, must be matched. However, the
multiple CPU setting for RnCPU and RnMTCPU is set in MELSOFT GX Works3 first, and the
setting can be read by MELSOFT MT Developer2 afterwards.
(a) Multiple CPU setting of Qn(H)CPU and Q17nCPUN(-T)
(b) Multiple CPU setting of RnCPU and RnMTCPU
[MELSOFT GX Works2]
[MELSOFT MT Developer2]
[MELSOFT MT Developer2]