Mitsubishi Q12PRHCPU - Appendix 6.4 PUTE Instruction

APPENDICES
Appendix 6 Precautions for Using Serial Communication Module
Appendix 6.4 PUTE Instruction
App - 42
9
PROCESSING TIME FOR REDUNDANT SYSTEMS
APPENDICESINDEX
Appendix 6.4 PUTE Instruction
The following shows the device and buffer memory used in the sample program of
registering the user registration frame.
(1) Device of programmable controller CPU
(2) I/O signal
(3) Buffer memory
Table.App 27 Device Used in the Program
Device No. Application Remarks
X50 Register request command ON: Register request
M1 Flash ROM write request flag ON: Flash ROM write request start
M50 Register request set ON: Registering
Table.App 28 List of I/O Signal
I/O signal
Signal name Description
CH1 side CH2 side
X(n+1)8 Flash ROM write completion ON: Completed
Y(n+1)8 Flash ROM write request ON: Requesting
Table.App 29 List of Buffer Memory
Buffer memory address Hexadecimal
(decimal)
Name Stored value
CH1 side CH2 side
2
H
(2)
Register/read/delete
instructions
0: No request
1: Registration request
2: Read request
3: Deletion request
3
H
(3)
Frame No. direction
0: No designation
Other than 0: Frame No.
4
H
(4)
Registration/read/delete
result storage
0: Normal completion
Other than 0: Abnormal
completion
5
H
(5)
Number of data bytes
registered designation
0 : No designation
Other than 0: Number of
data bytes registered
(maximum 80 bytes)
6
H
to 2D
H
(6 to 45)
User frame
0 : No designation
Other than 0: Registered
data (maximum 80 bytes)
2000
H
(8192)
Flash ROM write allow/
prohibit designation
0: Write prohibited
1: Write allowed