2-14
Theory
of
Operation
The signal on the audio path
is
applied to a programmable amplifier, whose setting
is
based on the
channel bandwidth being received, an LPF filter to remove any frequency components above
3000Hz, and HPF filter to strip off any sub-audible data below 300Hz. The recovered audio passes
through a de-emphasis
filter, if it is enabled, to compensate for pre-emphasis which is used to
reduce the effects
of
FM noise. The audio then goes through the 8-bit programmable attenuator
whose
level
is
set depending on the value of the volume control. The resulting filtered audio signal
is
passed through an output buffer within the ASFIC CMP and exits the ASFIC CMP at the AUDIO
output (U0221, pin 41).
The
IJP
programs the attenuator, using the SPI BUS, based on the volume setting. The minimum/
maximum settings
of
the attenuator are set by codeplug parameters.
Since sub-audible signalling
is
summed with voice information on transmit, it must be separated
from the voice information before processing.
Any
sub-audible signal enters the ASFIC CMP from
the
IF
IC
at DISC U0221, pin
2,
then through
the
PL/DPL path. The signal first passes through one
of
two low pass filters, either
PL
low pass filter, or DPL/LST low pass filter. Either signal is then
filtered, goes through a limiter, and exits the ASFIC CMP at LSIO (U0221, pin 18). At this point the
signal appears as a square wave version
of
the sub-audible signal the radio received. The
IJP
(U0101, pin 80) decodes the signal directly to determine if it is the tone/code currently active on that
mode.
2.3.5.3 Audio Amplification Speaker(+) Speaker(-)
The output
of
the ASFIC CMP's digital volume pot (U0221, pin 41) is routed through de blocking
capacitor C0256 to a buffer formed by U0211, pin
1.
Resistors R0256 and R0268 set the correct
input
level to the audio
PA
(U0271
).
This
is
necessary because the gain of the audio
PAis
46 dB and
the
ASFIC CMP output
is
capable of overdriving the
PA
unless the maximum volume
is
limited.
Resistor R0267 and capacitor C0267 increase frequency components below 350 Hz.
The audio then passes through
R0269 and C0272 which provides AC coupling and low frequency
roll-off. C0273 provides high frequency roll-off as the audio signal
is
routed to audio power amplifier
U0271,
pins 1 and 9 which are both tied to the received audio. The audio power amplifier has one
inverted and one non-inverted output that produces the
differential audio output SPK+/SPK-
(U0271,
pins 4 and 6).
The audio
PA's
de
biases are not activated until the audio
PAis
enabled at pin
8.
The audio
PAis
enabled via the ASFIC CMP (U0221, pin 38). When the base
of
00271
is
low,
the transistor is off
and
U0271-8
is
high via pull-up resistor R0273, and the audio
PAis
ON. The voltage at U0273-8
must be above 8.5Vdc to properly enable the device. If the voltage
is
between 3.3 and 6.4V, the
device is active, but has its input
(U0273, pins 1 and 9) off. This is a mute condition used
to
prevent
an audio pop when the
PAis
enabled.
The SPK+ and SPK- outputs of the audio
PA
are de biased and vary proportionately with
FLT
A+
(U0271, pin 7). FLT A+ of
11
V yields a de offset
of
5V,
and
FLT
A+
of
17V yields a de offset
of
8.5V.
If either
of
these lines is shorted to ground, it is possible that the audio
PA
could be damaged. SPK+
and SPK- are routed to the accessory connector (J0501, pins 1 and 16) and to the control head
connector
(J0401, pins 2 and 3).
2.3.5.4 Handset Audio
Certain accessories have a self contained speaker which requires a different voltage level than that
provided by
U0271. For those devices, HANDSET AUDIO is available at control head connector
J0401, pin
7.
The received audio from the output
of
the ASFIC CMP's digital volume attenuator and buffered
by
U0211, pin
1,
is
also routed to U0211, pin 9 where it
is
amplified
by
20 dB. This
is
set
by
the 1
Ok/
1
OOk
combination
of
R0261 and R0262. This signal is routed from the output
of
the op amp U0211
to J0401-7. The control head sends this signal directly out
to
the microphone jack. The maximum
value
of
this output
is
6.6Vp-p.
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