Theory of Operation
2-21
2.5.6 Harmonic Filter
Components L3491-L3493 and C3491-C3499 form a seven-pole Chebychev low-pass filter to
attenuate harmonic energy
of
the transmitter. R3491
is
used to drain electrostatic charge that might
otherwise build up on the antenna. The harmonic filter also prevents high level RF signals above the
receiver passband from reaching the receiver circuits, improving spurious response rejection.
2.5.7 Power Control
The transmitter uses the power control
IC
(PCIC, U3501) to control the power output
of
the radio. A
portion
of
the forward and reflected RF power from the transmitter
is
sampled by the directional
coupler, rectified and summed, to provide a de voltage to the RFIN port of the PCIC (pin
1)
which is
proportional to the sampled RF power.
The A8FIC contains a digital to analog converter (DAC) which provides a reference voltage
of
the
control loop to the PCIC via R3505. The reference voltage level
is
programmable through the
8PI
line of the PCIC. This reference voltage is proportional to the desired power setting
of
the
transmitter, and is factory programmed at
several points across the frequency range
of
the
transmitter to offset frequency response variations of the transmitter's power detector circuit.
The
PCIC provides a de output voltage at pin 4 (INT) which
is
amplified and shifted
in
de level by
U3402. The 0 to 4 Vdc range at U3501, pin 4 is translated to a 0 to 8.5 Vdc range at the output
of
U3402, and applied as VCONT to the power-adjust input pin
of
the first transmitter stage U3401.
This adjusts the transmitter power output to the intended value. Variations in forward or reflected
transmitter power cause the de voltage at pin 1 to change, and the PCIC adjusts the control voltage
above or below its nominal value to raise or lower output power.
Capacitors C3502-4,
in
conjunction with resistors and integrators within the PCIC, control the
transmitter power-rise (key-up) and power-decay (de-key) characteristic to minimize splatter into
adjacent channels.
U3502 is a temperature-sensing device, which monitors the circuit board temperature in the vicinity
of
the transmitter driver and final devices, and provides a de voltage to the PCIC (TEMP, pin 29)
proportional to temperature.
If
the de voltage produced exceeds the set threshold
in
the PCIC, the
transmitter output power is reduced so as to reduce the transmitter temperature.
The power control circuitry includes a safety switch (83440) that consists
of
a conductive portion
of
the rubber pad which pushes the RF final transistor 03441 against the chassis. When the chassis
cover and rubber pad are properly assembled, the conductive portion
of
the pad contacts a pattern
on the circuit board, electrically closing switch 83440. If the cover and pad are not
in
place, switch
83440 is open-circuited and the power control circuit is disabled. This prevents thermal damage
of
the
RF
final transistor which might occur if the transmitter is operated without adequate heatsinking.
2.6 Frequency Synthesis
The frequency synthesizer subsystem consists
of
the reference oscillator (Y3263), the Low Voltage
Fractionai-N synthesizer (LVFRAC-N, U3201), and the voltage-controlled oscillators and buffer
amplifiers (U3301,
03301,
03304
and associated circuits).
2.6.
1 Reference Oscillator
The reference oscillator (Y3263) contains a temperature compensated crystal oscillator with a
frequency
of
16.8 MHz. An analog-to-digital (A/D) converter internal to U3201 (LVFRAC-N) and
controlled by the
IJP
via serial interface (8RL) sets the voltage at the warp output
of
U3201 (pin 25)
to set the frequency
of
the oscillator. The output
of
the oscillator (Y3263 pin
3)
is applied to pin 23
_)
(XTAL
1)
of
U3201 via R3263 and C3235.
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