NEC MultiSync LCD1920NX User Manual

7-26
Output Pins Description
Pin Name Pin # Type Description
QE23 - QE0
See SiL161A
Pin Diagram
Out Output Even Data [23:0] corresponds to 24-bit pixel
data for 1-pixel/clock input mode and to the first
24-bit pixel data for 2-pixels/clock mode.
Output data is synchronized with output data clock
(ODCK).
Refer to the TFT Signal Mapping application note
(SiL/AN-0007) which tabulates the relationship
between the input data to the transmitter and output
data from the receiver.
A low level on PD or PDO will put the output drivers
into a high impedance (tri-state) mode. A weak
internal pull-down device brings each output to
ground.
QO23 - QO0
See SiL161A
Pin Diagram
Out Output Odd Data [23:0] corresponds to the second
24-bit pixel data for 2-pixels/clock mode.
During 1-pixel/clock mode, these outputs are driven
low.
Output data is synchronized with output data clock
(ODCK).
Refer to the TFT Signal Mapping application note
(SiL/AN-0007) which tabulates the relationship
between the input data to the transmitter and output
data from the receiver.
A low level on PD or PDO will put the output drivers
into a high impedance (tri-state) mode. A weak
internal pull-down device brings each output to
ground.
ODCK
44 Out Output Data Clock.
This output can be inverted using the OCK_INV pin.
A low level on PD or PDO will put the output driver
into a high impedance (tri-state) mode. A weak
internal pull-down device brings the output to
ground.
DE
46 Out Output Data Enable.
This signal qualifies the active data area. A HIGH
level signifies active display time and a LOW level
signifies blanking time. This output signal is
synchronized with the output data. A low level on
PD or PDO will put the output driver into a high
impedance (tri-state) mode. A weak internal
pull-down device brings the output to ground.
HSYNC
48 Out Horizontal Sync input control signal.
VSYNC
47 Out Vertical Sync input control signal.
CTL1
40 Out General output control signal 1.
This output is not powered down by PDO.
CTL2
41 Out General output control signal 2.
CTL3
42 Out General output control signal 3.
A low level on PD or PDO will put the output drivers
(except CTL1 by PDO) into a high impedance
(tri-state) mode. A weak internal pull-down device
brings each output to ground.

NEC MultiSync LCD1920NX Specifications

General

Brand	NEC
Model	MultiSync LCD1920NX
Category	Monitor
Language	English