PCIe Compliance Testing Reference
PRELIMINARY INFORMATION
Jetson AGX Orin Series Tuning and Compliance Guide DA-11040-001_v0.7 | 17
AC timing to make sure that REFCLK does not compromise Tx compliance masks with
excessive jitter.
Note that REFCLK setup for REFCLK standalone characterization is different from REFCLK
setup in Tx compliance test.
REFCLK Measurement Probe Selection
For REFCLK standalone characterization NVIDIA recommends using high-impedance probes
to replicate the open REFCLK termination with 2 pF termination against GND. For differential
standalone measurements, 2x single ended active or a single differential active probe may be
considered as best solution.
Pay attention to the different REFCLK setup when running standalone REFCLK
characterization compared to REFCLK setup for Tx compliance. When setting up REFCLK with
Tx compliance testing, the DUT setup expects a normal test configuration connecting 50 Ω
SMA cables to the scope input with 50 Ω termination. For a “CLB-like” setup an additional 2 pF
termination to GND may be considered. This means that the REFCLK setup for standalone
REFCLK characterization is different from Tx characterization.
For Tx compliance the expectation is that jitter behavior will only show a small difference to
the open circuit test. The recommendation is that, if eye opening fails, then capture the clock
with high impedance probes (REFCLK setup) to analyze the waveform and exclude possible
issues from 50 Ω termination.
In all cases, probes must be calibrated and de-skewed especially for the single-ended probe
measurements.
Single-Ended REFCLK AC Measurements
Figure 4 shows a single-ended (SE) setup for REFCLK AC measurements.
Figure 4. SE DUT for REFCLK AC Measurement
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