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Omron CJ1M-CPU21 User Manual

Omron CJ1M-CPU21
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68
Auxiliary Area Data Allocation Section 4-3
4-3 Auxiliary Area Data Allocation
4-3-1 Auxiliary Area Flags and Bits for Built-in Inputs
The following tables show the Auxiliary Area words and bits that are related to
the CJ1M CPU Unit's built-in inputs. These allocations apply to CPU Units
equipped with the built-in I/O functions only.
Interrupt Inputs
High-speed Counters
Name Address Description Read/Write Times when data is
accessed
Interrupt Counter 0
Counter SV
A532 Used for interrupt input 0 in counter mode.
Sets the count value at which the interrupt task
will start. Interrupt task 140 will start when inter-
rupt counter 0 has counted this number of
pulses.
Read/Write Retained when
power is turned
ON.
Retained when
operation starts.
Interrupt Counter 1
Counter SV
A533 Used for interrupt input 1 in counter mode.
Sets the count value at which the interrupt task
will start. Interrupt task 141 will start when inter-
rupt counter 1 has counted this number of
pulses.
Read/Write
Interrupt Counter 2
Counter SV
A534 Used for interrupt input 2 in counter mode.
Sets the count value at which the interrupt task
will start. Interrupt task 142 will start when inter-
rupt counter 2 has counted this number of
pulses.
Read/Write
Interrupt Counter 3
Counter SV
A535 Used for interrupt input 3 in counter mode.
Sets the count value at which the interrupt task
will start. Interrupt task 143 will start when inter-
rupt counter 3 has counted this number of
pulses.
Read/Write
Interrupt Counter 0
Counter PV
A536 These words contain the interrupt counter PVs
for interrupt inputs operating in counter mode.
In increment mode, the counter PV starts incre-
menting from 0. When the counter PV reaches
the counter SV, the PV is automatically reset to
0.
In decrement mode, the counter PV starts dec-
rementing from the counter SV. When the
counter PV reaches the 0, the PV is automati-
cally reset to the SV.
Read/Write Retained when
power is turned
ON.
Cleared when
operation starts.
Refreshed when
interrupt is gener-
ated.
Refreshed when
INI(880) instruc-
tion is executed.
Interrupt Counter 1
Counter PV
A537 Read/Write
Interrupt Counter 2
Counter PV
A538 Read/Write
Interrupt Counter 3
Counter PV
A539 Read/Write
Name Address Description Read/Write Times when data is
accessed
High-speed Counter
0 PV
A270 to
A271
Contains the PV of high-speed counter 0. A271
contains the leftmost 4 digits and A270 contains
the rightmost 4 digits.
Read only Cleared when
power is turned
ON.
Cleared when
operation starts.
Refreshed each
cycle during over-
seeing process.
Refreshed when
PRV(881) instruc-
tion is executed
for the corre-
sponding counter.
High-speed Counter
1 PV
A272 to
A273
Contains the PV of high-speed counter 1. A273
contains the leftmost 4 digits and A272 contains
the rightmost 4 digits.
Read only

Table of Contents

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Omron CJ1M-CPU21 Specifications

General IconGeneral
CPU TypeCJ1M
Model NumberCJ1M-CPU21
Data Memory Capacity32K words
Operating Voltage24 VDC
Operating Temperature0 to 55 °C
Execution Speed0.1 μs (basic instructions)
Serial CommunicationRS-232C
Expansion CapabilityUp to 3 expansion units
Programming LanguageLadder logic, structured text
Built-in I/O PointsNo built-in I/O

Summary

PRECAUTIONS

1 Intended Audience

Identifies target personnel for the manual, requiring knowledge of electrical and FA systems.

2 General Precautions

Emphasizes operating products as specified and consulting OMRON for critical applications.

3 Safety Precautions

Crucial warnings about PLC operation, memory modification, and handling electrical components to prevent injury.

4 Operating Environment Precautions

Guidelines on avoiding hazardous locations like direct sunlight, extreme temperatures, or corrosive environments.

5 Application Precautions

Precautions for system setup, grounding, power supply handling, and component mounting during operation.

6 Conformance to EC Directives

Details on compliance with EMC and Low Voltage Directives for safe system integration.

SECTION 1 Features

1-1 Features

Overview of CJ1M CPU Units' high-speed, advanced, micro-sized PLCs with built-in I/O.

1-2 Version Upgrades for CJ1M CPU Units

Details on functional improvements from unit version upgrades for CJ1M CPU Units.

1-3 Functions Listed by Purpose

Categorization of built-in I/O functions based on their specific purpose.

SECTION 2 Overview

2-1 Allocations for Built-in CPU Unit Inputs

Mapping of physical inputs to internal addresses and their functional assignments.

2-2 Allocations for Built-in CPU Unit Outputs

Mapping of physical outputs to internal addresses and their functional assignments.

2-3 Allocations for Origin Search Function

Details on I/O points utilized by the origin search function for pulse outputs.

SECTION 3 I/O Specifications and Wiring

3-1 I/O Specifications

Electrical and functional specifications for built-in inputs and outputs, including voltage and current ratings.

3-2 Wiring

Information on connector pin allocations and wiring methods for system connections.

3-3 Wiring Examples

Practical illustrations of various I/O connection configurations for different devices.

SECTION 4 Data Area Allocation and PLC Setup Settings

4-1 Data Area Allocation for Built-in I/O

Allocation of memory words and bits for built-in I/O usage.

4-2 PLC Setup Settings

Configuration parameters within the PLC for managing built-in I/O functionality.

4-3 Auxiliary Area Data Allocation

Allocation of auxiliary area words and bits related to built-in inputs and outputs.

4-4 Flag Operations during Pulse Output

Explanation of how flags change relative to pulse output operations and timing.

SECTION 5 High-speed Counter/Pulse Output Instructions

5-1 MODE CONTROL: INI(880)

Controls operations for high-speed counters and pulse outputs, including starting/stopping and PV changes.

5-2 HIGH-SPEED COUNTER PV READ: PRV(881)

Reads Present Values (PVs) and status information for high-speed counters and pulse outputs.

5-3 COUNTER FREQUENCY CONVERT: PRV2(883)

Converts pulse frequency to rotational speed or total revolutions.

5-4 REGISTER COMPARISON TABLE: CTBL(882)

Registers comparison tables and performs target or range comparisons for high-speed counter PVs.

5-5 SPEED OUTPUT: SPED(885)

Sets output pulse frequency and starts pulse output without acceleration/deceleration.

5-6 SET PULSES: PULS(886)

Sets the number of output pulses for SPED(885) or ACC(888) in independent mode.

5-7 PULSE OUTPUT: PLS2(887)

Outputs specified pulses with acceleration/deceleration, supporting target changes.

5-8 ACCELERATION CONTROL: ACC(888)

Outputs pulses with specified acceleration/deceleration rates, supporting mode changes.

5-9 ORIGIN SEARCH: ORG(889)

Performs origin search or origin return operations using specified methods and parameters.

5-10 PULSE WITH VARIABLE DUTY FACTOR: PWM(891)

Generates PWM pulse outputs with a specified duty factor and frequency.

SECTION 6 Built-in I/O Function Descriptions

6-1 Built-in Inputs

Detailed description of the types, allocations, and specifications of built-in inputs.

6-2 Built-in Outputs

Detailed description of the types, allocations, and specifications of built-in outputs.

6-3 Origin Search and Origin Return Functions

Detailed explanation of origin search and return operations and their parameters.

SECTION 7 Programming Examples

7-1 Built-in Outputs

Practical examples illustrating the programming of built-in output functions.

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