Appendices
A-34
CJ-series EtherNet/IP Units Operation Manual for NJ-series CPU Unit (W495)
CIO n+16 to n+19: Registered Target Node Table
The device variable that corresponds to all of the bits in CIO n+16 to n+19 is given in the following
table.
The device variables that correspond to bits 00 to 15 in CIO n+16 to n+19 are given in the following
table.
I/O memory location in CJ-
series CPU Unit
Device variable for the CJ-series Unit in NJ-series CPU Unit
Word address Bit numbers Variable name Description
CIO n+16 to
n+19
00 to 15 in
each word
*_RegTargetSta Registered Target Node Table
(The functions of bits 00 to 15 in these words and
the functions of the device variable given on the left
correspond as given below.)
• Bits 00 to 15 of CIO n+16 correspond to bits 00 to
15 of the device variable given on the left.
• Bits 00 to 15 of CIO n+17 correspond to bits 16 to
31 of the device variable given on the left.
• Bits 00 to 15 of CIO n+18 correspond to bits 32 to
47 of the device variable given on the left.
• Bits 00 to 15 of CIO n+19 correspond to bits 48 to
63 of the device variable given on the left.
I/O memory location in CJ-
series CPU Unit
Device variable for the CJ-series Unit in NJ-series CPU Unit
Word address Bit numbers Variable name Description
CIO n+16 0 *_RegTargetSta[0] Registered Target Node Table Bit for Node Address
0
1 *_RegTargetSta[1] Registered Target Node Table Bit for Node Address
1
2 *_RegTargetSta[2] Registered Target Node Table Bit for Node Address
2
3 *_RegTargetSta[3] Registered Target Node Table Bit for Node Address
3
4 *_RegTargetSta[4] Registered Target Node Table Bit for Node Address
4
5 *_RegTargetSta[5] Registered Target Node Table Bit for Node Address
5
6 *_RegTargetSta[6] Registered Target Node Table Bit for Node Address
6
7 *_RegTargetSta[7] Registered Target Node Table Bit for Node Address
7
8 *_RegTargetSta[8] Registered Target Node Table Bit for Node Address
8
9 *_RegTargetSta[9] Registered Target Node Table Bit for Node Address
9
10 *_RegTargetSta[10] Registered Target Node Table Bit for Node Address
10
11 *_RegTargetSta[11] Registered Target Node Table Bit for Node Address
11
12 *_RegTargetSta[12] Registered Target Node Table Bit for Node Address
12
13 *_RegTargetSta[13] Registered Target Node Table Bit for Node Address
13
14 *_RegTargetSta[14] Registered Target Node Table Bit for Node Address
14
15 *_RegTargetSta[15] Registered Target Node Table Bit for Node Address
15