Panasonic DMR-XW380EB

S-7
S3.2. Analog Video Block Diagram
V/Y IN
CPN C IN
MAIN P.C.B.
:PB SIGNAL:REC SIGNAL
RED/C15
VIDEO/Y19
GREEN11
(TV)
AV1
BLUE7
21PIN JACK
JK3901
OUT
VIDEO OUT
JK3002
4
(EXT)
AV2
VIDEO19
21PIN JACK
JK3901
DIGITAL P.C.B.
TO
P58007P3001
6
4
P3001 P58007
P58007P3001
19
18
P3001 P58007
P58003P3002
7
20
25
27
12
13
5
11
P3001 P58007
35
33
12
14
16
8
6
10
(VIDEO PROCESSOR)
IC3001
AV2 V/Y
< B > < RGB CPSV > < R > < G >
AV2 B
AV2 G
AV2 R/C
FRONT V
19
64
1
3
(EXT)
AV2
VIDEO/Y
BLUE
GREEN
RED/C
20
7
11
15
21 PIN JACK
JK3901
VIDEO IN
21
36
JK3801
FRONT JACK
37
2
17
46
44
42
40
38
AV1 VIDEO
(TV)
AV1
20
21 PIN JACK
JK3901
FROM
DIGITAL
BLOCK
SECTION
FROM/TO
TIMER
BLOCK
SECTION
HD PB OUT
HD Y OUT
HD PR OUT
SD Y OUT
SD C OUT
P58007
15 16
P3001
P3001P58007
16 15
I2C DATA
I2C CLK
P58007
22 9
P3001
P3001P58007
23 8
P3002P58003
6 4
P58005P6702
1 1
17 14
P58007 P3001
19 12
P58007 P3001
20 11
P3001P58007
< R >
< B >
< RGB CPSV >
< G >
DMR-XW380EB
Analog Video Block Diagram
SV14
a
b
SV5
AV3 V
AV1 V
AV1 V
AV1 V
AV2 V/Y
AV2 V/Y
AV2 V/Y
SV6
a,b,
c,d
c
a,b,
c,d
c
CLAMP
CLAMP
CLAMP
CLAMP/
BIAS
CLAMP
SERIAL
CONTROL
OUT
ADC
V/Y
OUT
C-ADC
OUT
V
AV2
OUT
VY
AV1
OUT
V
OUT
G
AV1
OUT
B
AV1
OUT
R-C
AV1
f
SV11b
ENC R
ENC Y
ENC Y+C
ENC C
ENC G
AV2 B
AV2 G
AV2 R/C
ENC B
a
b,d,e
c
a
SV1
d,e,f
c
b
a
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
SV4
d
c
b
a
SV3
d
c
b
CLAMP
BIAS
CLAMP/
CLAMP
BIAS
CLAMP/
+
+
6MHz
CLAMP
6MHz
BIAS
ENC C IN
ENC Y IN
ENC G IN
ENC R IN
ENC B IN
SV13b
f
b,c,d,e
a
SV12b
f
b,c,d,e
a
SV2
a
c
b,e,d
SV7
c,d
b
c
AV2 V/Y
AV2 B
AV2 G
AV2 R/C
SV16
AV3 V
SDA
SCL
AV1 V
6MHz
6MHz
6MHz
6dB
6dB
6dB
6dB
6dB
6dB
0dB
0dB