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Philips 32PFL7623D/10 - Page 189

Philips 32PFL7623D/10
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Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 189Q529.1E LA 9.
Figure 9-11 PNX5100 Detailed Video Block diagram
9.7.1 PNX5100
The PNX5100 performs the following tasks:
Picture quality improvement (Natural Motion, etc.).
Video and graphics (On Screen Display) mixing.
Up conversion from 50/60 to 100/120 Hz.
Colour processing
Sharpness processing
Backlight control
AmbiLight pre processing
Switching On and Off of the display
Pattern generator
The PNX5050 interfaces:
Video input (CMOS).
Graphics input (PCI).
•I
2
C.
Field memory (2 × DDR).
Video output: LVDS (single, dual or quad) to display
Backlight control: PWM for dimming and boost
AmbiLight: CMOS sequential RGB to FPGA
•GPIO
Refer to figure “9-11 PNX5100 Detailed Video Block diagram”
for details.
9.8 Ambient Light, Spartan-3
In this chassis, LED AmbiLight units are used as light units.
The units are completely aligned in factory and are a “Black
Box” for Service. When defective, they must be replaced
entirely. Refer to the Spare Parts List for the correct order
number.
The AmbiLight units are addressed by I
2
C. The communication
with the SSB to the ARM processor(s) of the units is
bi-directional.
On the SSB the FPGA Spartan-3 performs driving towards the
Pixelated AmbiLight units. The following features have been
incorporated:
Dedicated dealer mode
9600 series:
Both left and right side of the screen two pixels
Lounge Light mode
One controlling microprocessor.
9700 series:
Both left and right side of the screen two pixels
Top side of the screen three pixels
Lounge Light mode
Two controlling microprocessors.
9.9 DLNA
Is an international, cross-industry collaboration of consumer
electronics, computing industry and mobile device companies
standard. The main objective of DLNA is the establishment of
a wired and wireless interoperable network of personal
computers (PC), consumer electronics (CE) and mobile
devices in the home and on the road, enabling a seamless
environment for sharing new digital media and content
services. DLNA is focused on delivering an interoperability
framework of design guidelines based on open industry
standards to complete the cross-industry digital convergence.
The TV522 platform is set up as Digital Media Player. It can find
and play or display the content that is shared on your network
by server devices. In this chassis, an Ethernet MAC/PHY for
wired Ethernet is incorporated to support DLNA.
Main features:
National Semiconductors DP83816
Controlled over PCI interface
Physical layer uses a top-entry RJ45 with integrated
magnetics (UTP)
Supports 10M and 100M (full and half duplex)
Uses 3V3 only (divided into separate analog and digital
supply planes)
The network controller shares the interrupt with the USB
host controller
The network controller can access the DRAM to
dump/fetch packets.
PNX5100
1M591M99
LVDS
HD
HD DF
fHD
fHD DF
PNX8541
AmbiLight
Display
Supply
Level
shift
Lamp On
Conver ter
PWM Dimming
2x DDR
Analog /PW M
Dimming
RGB-Ambi
SPARTAN3
MIPS StdBy
PWM Boost
Conver ter
Analog Boost
YUV
10b
LVDS
10b
1G51 LVDS 51p 1G50 LVDS 41p
I2C
Analog /PW M Dim ming
Analog /PW M Display
I_17660_145.eps
170308

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