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Philips VES2.2E LA - Circuit Descriptions

Philips VES2.2E LA
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Circuit Descriptions
EN 19VES.2.2E LA 7.
2013-Jul-19
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7. Circuit Descriptions
Index of this chapter:
7.1
Introduction
7.2 Power Supply
7.3 Power Management
7.4 Circuit Description
Notes:
Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9.
Block Diagrams) and circuit diagrams (see chapter
10.
Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
VES2.2E LA main board is driven by MStar SOC. This IC is a
single chip IDTV solution that supports channel decoding,
MPEG decoding, and media-centre functionality enabled by a
high performance AV CODEC and CPU.
Combo Front-End Demodulator
A multi-standard A/V format decoder
The MACEpro video processor
Home theatre sound processor
Internet and Variety of Connectivity Support
Dual-stream decoder for 3D contents
Multi-purpose CPU for OS and multimedia
Peripheral and power management
7.1.1 VES2.2E LA Architecture Overview
For details about the chassis block diagrams refer
to chapter 9.
Block Diagrams.

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