IC Data Sheets
EN 23VES.2.2E LA 8.
2013-Jul-19
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8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).
8.1 Diagram 10-3-4 B04, Tuner, USB, WiFi, Si2156 (U18)
Figure 8-1 Internal block diagram and pin configuration
19420_300_130314.eps
130314
Block diagram
Pinning information
GND_PAD
17
27
28
29
30
1819
31
32
20
RF_IN
XOUT
VDD_L
RF_SHLD
RF_SHLD
RF_IP
VDD_H
XTAL_I
16
15
21222324
BCLK
RSTB
6 7 85
DLIF_P
DLIF_N
ALIF_P
VDD_H
13
14
12
11
9
10
1 2 3 4
25
26
GND
SDA
GND
VDD_D
SCL
VDD_S
VDD_IO
ALIF_AGC
ADDR
DLIF_AGC
ALIF_N
VDD_H
GPIO1
INTB/GPIO2
XTAL_O
GND
GND
GND
DSP
FILTER
ATV
DEMOD
I
ADC
Q
ADC
0 / 90 LOW-IF
FREQ
SYNTH
RF
AGC
LDO
IF
AGC
OUTPUT
INTERFACE
XOSC
XTAL_I
PGA
PGA
CONTROL
INTERFACE
XTAL_O
XOUT
BCLK
AGC
Si2156
RF_IN
RF_IP
ANTENNA
INPUT
Balun
DTV
DEMOD
AV
SoC
GPIO
RSTB
ADDR
SCL
SDA
INTB
DLIF
DSP
FILTER
ATV
DEMOD
AGC
ALIF
3.3 V
1.8 V
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