UMTS/HSPA Module Series
UC20 Hardware Design
UC20_Hardware_Design Confidential / Released 30 / 82
2A at least. If the voltage drop between the input and output is not too high, it is suggested to use a LDO
to supply power for module. If there is a big voltage difference between the input source and the desired
output (VBAT), a buck converter is preferred to be used as a power supply.
The following figure shows a reference design for +5V input power source. The designed output for the
power supply is about 3.8V and the maximum load current is 3A.
DC_IN
C1
C2
MIC29302WU U1
IN
OUT
EN
GND
ADJ
2 4
1
3
5
VBAT
100nF
C3
470uF
C4
100nF
R2
100K
47K
R3
470uF
470R
51K
R4
R1
1%
1%
Figure 8: Reference Circuit of Power Supply
3.6.4. Monitor the Power Supply
You can use the AT+CBC command to monitor the VBAT_BB voltage value. For more details, please
refer to document [1].
3.7. Turn on and off Scenarios
3.7.1. Turn on Module Using the PWRKEY
The following table shows the pin definition of PWRKEY.
Table 7: PWRKEY Pin Description
V
IH
max = 2.1V
V
IH
min = 1.3V
V
IL
max = 500mV
Pull-up to 1.8V internally
with 200kΩ resistor.
When UC20 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a
low level at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY.
After STATUS pin (require external pull-up) outputting a low level, PWRKEY pin can be released. A simple
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