RL78/G13 CHAPTER 5 CLOCK GENERATOR
R01UH0146EJ0100 Rev.1.00 296
Sep 22, 2011
(6) Peripheral enable register 0 (PER0)
These registers are used to enable or disable supplying the clock to the peripheral hardware. Clock supply to the
hardware that is not used is also stopped so as to decrease the power consumption and noise.
To use the peripheral functions below, which are controlled by this register, set (1) the bit corresponding to each
function before specifying the initial settings of the peripheral functions.
• Real-time clock, interval timer
• Serial interface IICA1
• A/D converter
• Serial interface IICA0
• Serial array unit 1
• Serial array unit 0
• Timer array unit 1
• Timer array unit 0
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Figure 5-7. Format of Peripheral Enable Register 0 (PER0) (1/3)
Address: F00F0H After reset: 00H R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PER0 RTCEN
IICA1EN
Note 1
ADCEN
IICA0EN
Note 2
SAU1EN
Note 3
SAU0EN
TAU1EN
Note 1
TAU0EN
RTCEN Control of real-time clock (RTC) and interval timer input clock supply
0
Stops input clock supply.
• SFR used by the real-time clock (RTC) and interval timer cannot be written.
• The real-time clock (RTC) and interval timer are in the reset status.
1
Enables input clock supply.
• SFR used by the real-time clock (RTC) and interval timer can be read and written.
IICA1EN Control of serial interface IICA1 input clock supply
0
Stops input clock supply.
• SFR used by the serial interface IICA1 cannot be written.
• The serial interface IICA1 is in the reset status.
1
Enables input clock supply.
• SFR used by the serial interface IICA1 can be read and written.
Notes 1. 80, 100, and 128-pin products only.
2. This is not provided in the 20-pin products.
3. This is not provided in the 20, 24, and 25-pin products.
Caution Be sure to clear the following bits to 0.
20-pin products: bits 1, 3, 4, 6
24, 25-pin products: bits 1, 3, 6
30, 32, 36, 40, 44, 48, 52, 64-pin products: bits 1, 6
<R>
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