RL78/G13 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 538
Sep 22, 2011
12.1.3 Simplified I
2
C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30, IIC31)
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
(SCL) and serial data (SDA). This simplified I
2
C is designed for single communication with a device such as EEPROM,
flash memory, or A/D converter, and therefore, it functions only as a master.
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and stop
conditions are observed.
For details about the settings, see 12.8 Operation of Simplified I
2
C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30,
IIC31)
[Data transmission/reception]
• Master transmission, master reception (only master function with a single master)
• ACK output function
Note
and ACK detection function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the least
significant bit is used for R/W control.)
• Manual generation of start condition and stop condition
[Interrupt function]
• Transfer end interrupt
[Error detection flag]
• Parity error (ACK error), or overrun error
* [Functions not supported by simplified I
2
C]
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection functions
Note When receiving the last data, ACK will not be output if 0 is written to the SOEmn bit (serial output enable register
m (SOEm)) and serial communication data output is stopped. See the processing flow in 12.8.3 (2) for details.
Remark To use an I
2
C bus of full function, see CHAPTER 13 SERIAL INTERFACE IICA.
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