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Renesas RL78/G1D User Manual

Renesas RL78/G1D
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RL78/G13 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 694
Sep 22, 2011
Figure 12-114. Flowchart of Data Reception
Caution ACK is not output when the last data is received (NACK). Communication is then completed by
setting “1” to the STmn bit of serial channel stop register m (STm) to stop operation and
generating a stop condition.
Starting data reception
Data reception completed
No
Yes
Writing dummy data (FFH) to
SIOr (SDRmn[7:0])
Stop condition
g
eneration
Yes
No
Reading SIOr (SDRmn[7:0])
Address field transmission completed
Writing 1 to the STmn bit
Writing 0 to the TXEmn bit, and 1 to the RXEmn bit
Writing 1 to the SSmn bit
Last byte received?
Yes
Writing 0 to the SOEmn bit
(Output stop by serial
communication operation)
Data transfer completed?
No
Transfer end interrupt
generated?

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Renesas RL78/G1D Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1D
CategoryComputer Hardware
LanguageEnglish

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