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Renesas RL78/G1D User Manual

Renesas RL78/G1D
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RL78/G13 CHAPTER 14 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
R01UH0146EJ0100 Rev.1.00 788
Sep 22, 2011
(3) Multiplication/division data register C (MDCL, MDCH)
The MDCH and MDCL registers are used to store the accumulated result while in the multiply-accumulator mode or
the remainder of the operation result while in the division mode. These registers are not used while in the
multiplication mode.
The MDCH and MDCL registers can be set by a 16-bit manipulation instruction.
Reset signal generation clears these registers to 0000H.
Figure 14-4. Format of Multiplication/Division Data Register C (MDCH, MDCL)
Address: F00E0H, F00E1H, F00E2H, F00E3H After reset: 0000H, 0000H R/W
F00E3H F00E2H
MDCH MDCH
15
MDCH
14
MDCH
13
MDCH
12
MDCH
11
MDCH
10
MDCH
9
MDCH
8
MDCH
7
MDCH
6
MDCH
5
MDCH
4
MDCH
3
MDCH
2
MDCH
1
MDCH
0
F00E1H F00E0H
MDCL MDCL
15
MDCL
14
MDCL
13
MDCL
12
MDCL
11
MDCL
10
MDCL
9
MDCL
8
MDCL
7
MDCL
6
MDCL
5
MDCL
4
MDCL
3
MDCL
2
MDCL
1
MDCL
0
Symbol
Symbol
Cautions 1. The MDCH and MDCL registers values read during division operation processing (when the
multiplication/division control register (MDUC) value is 81H or C1H) will not be guaranteed.
2. During multiply-accumulator processing (when the MDUC register value is 41H or 49H), do not
use software to rewrite the values of the MDCH and MDCL registers. If this is done, the
operation result will be undefined.
3. The data is in the two's complement format in the multiply-accumulator mode (signed).
Table 14-4. Functions of MDCH and MDCL Registers During Operation Execution
Operation Mode Setting Operation Result
Multiplication mode (unsigned
or signed)
− −
Multiply-accumulator mode
(unsigned)
MDCH: Initial accumulated value (unsigned)
(higher 16 bits)
MDCL: Initial accumulated value (unsigned)
(lower 16 bits)
MDCH: accumulated value (unsigned)
(higher 16 bits)
MDCL: accumulated value (unsigned)
(lower 16 bits)
Multiply-accumulator mode
(signed)
MDCH: Initial accumulated value (signed)
(higher 16 bits)
MDCL: Initial accumulated value (signed)
(lower 16 bits)
MDCH: accumulated value (signed)
(higher 16 bits)
MDCL: accumulated value (signed)
(lower 16 bits)
Division mode
−
MDCH: Remainder (higher 16 bits)
MDCL: Remainder (lower 16 bits)

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Renesas RL78/G1D Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1D
CategoryComputer Hardware
LanguageEnglish

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