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SEPTENTRIO AsteRx-m2 - Page 14

SEPTENTRIO AsteRx-m2
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14
14
AsteRx-m2 OEM
14
Pin#
Name
Type
Level
Description
Comment
2
Reserved
4
GND
Gnd
Ground
6
Reserved
8
GND
Gnd
Ground
10
Reserved
12
CTS2
I, K
LVTTL
Serial COM 2 CTS line. Must be driven low when ready to receive
data from the AsteRx-m2.
14
CTS3
I, K
LVTTL
Serial COM 3 CTS line. Must be driven low when ready to receive data
from the AsteRx-m2.
16
RX4
I, K
LVTTL
Serial COM 4 receive line (inactive state is high).
18
GND
Gnd
Ground
20
Reserved
22
Reserved
24
Reserved
26
Reserved
28
Reserved
30
GND
Gnd
Ground
32
RMII_CLK
O
LVTTL
LAN PHY Clock
See section 2.12
34
RMII_TXD0
O
LVTTL
LAN PHY transmit data 0
See section 2.12
36
GND
Gnd
Ground
38
RMII_RXD0
I
LVTTL
LAN PHY receive data 0
See section 2.12
40
RMII_RXD1
I
LVTTL
LAN PHY receive data 1
See section 2.12
42
GND
Gnd
Ground
44
GP2
O
LVTTL
General purpose output. GP2 in setGPIOFunctionality command.
See section 2.8
46
Reserved
48
Reserved
50
GND
Gnd
Ground
52
Reserved
54
MDIO
I/O
LVTTL
LAN PHY control data
See section 2.12
56
MDC
O
LVTTL
LAN PHY control clock
See section 2.12
58
GND
Gnd
Ground
60
REF IN
Clk
10-MHz frequency reference input
AC-coupled, 13-kOhm input impedance, 2-5Vpp
See section 2.6

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