-
MZ-5600
(1)
When
accessing
the
I/O
port
of
the AY-3-8912
sound
IC), load
I/O
register
address
into
231
H, then
write the
I/O
data
to
230H.
(2)
When
initializing the
lOA
port, write the data
to
be
output
(described above), then place the port in the
output
mode. This
is
needed
to
maintain the SEL
and
MOTOR
ON
signals
inactive during initialization.
DEVICE
ADD BIT Signal name I/O After power
on
Initialize
IDO
----
PORT-C
070H
101
---
OUT
(LS74)
Don't
care
102
High Den MFD *1M/640K alternate signal
103
FDCRST
FDC reset
signal (reset with
"1")
lDO
~
PORT-B
270H
101
----
IN
("0"
-
SW
OFF
"1"
-
SW
ON
& CPU)
Input
mode
(L8387)
ID2
DIPSW7
SW1
}
Svstem~D~
SW
(See separate page)
103
DIPSwa
SWS
"
ay
...... dip .Itich function
Function
Factory
setup
OFF
For
u
..
of
the
hiQh
resolution dilPlay
(400
reuters)
SW1
ON
For
u
..
of
the
mlddl.
resolution dilPlay
(200 restel1)
SW2
OFF
Normally OFF
ON
Self-check mode*
SW3
R
...
rved
SW4
SW5
OFF
8MHz
CPU
clock
ON
5MHz
CPU
clock
SW6
OFF
8087
arithmetic processor
not
in
use**
ON
8087
arithmetic processor
in
use
SW7
SWS
7. DMA INTERFACE CIRCUIT
7-1
Block diagram
HRQ
HLDA>-----------------~~
DREQO
~:~~~
J To I/O slot
To
HOLD
conversion
circuit
AS-IS
A16-19
DO-IS
16++S
Command
eLK
--41
....... --11>
HRQ
HLrn.
DACKO
AO
DREQ3
I
DACK3
t---<DREQ3
DACK3
A7
~
____
~
____
~
DREQl~----~
...
ADSTB
D~EQ
t---~+----~
DBO
........
----1
I
DACKl~--------------~DACK
DB7
DREQ21E-----l
IOR
IOW
DACK2t-+-----~
MEMR
READY
MEMW
CLK
,
D Q
DACK2
(DRAM refresh circuit)
CTC-l
RDY-------~
-81-
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