-
MZ-5600
74LS670
write
function
table
Table
40
Write
input
Word
WB
WA
GW
0 1
2
L L
L
Q=O
QO
.
QO
L H L
QO
Q=O
QO
H L
L
QO
QO
OzO
H H
L
QO
QO
00
X X H
00
QO
00
74LS670 read
function
table
Table
41
Read
input
Output
RB
RA
GR
Ql
Q2
Q3
L L
L
WOBl
WOB2 WOB3
L H
L
W1Bl
W1B2 W1B3
H
L
L
W2Bl
W2B2 W2B3
H H
L
W3Bl
W3B2 W3B3
X X H
Z Z Z
3
QO
QO
00
Q=O
QO
04
WOB4
W1B4
W2B4
W3B4
Z
Notes: 1)
H:
High level,
L:
L
7N
level.
X:
Optional'
level,
Z:
High impedance
(off).
2)
0=0:
Selected internal
flipflop's
output,
assumĀ·
ing
that
data
is
input
to
all the
four
external data inputs.
3)
00:
Level
of
0 before the input,
condition
is
establ ished.
4)
WOBl :
Bit
1
of
word
0, and
so
on.
Fig. 89
Colors on a
color
display and gradations on a monochrome
display
are
specified by values set in the palette register
(74
LS670).
Data loaded in the
VRAM
is
simultaneously read through
VRAM
1, 2, and 3
for
the display.
These
three bits,
if
regarded
as
binary numbers, represent decimal numbers 0
-66-
through 7, which
are
used
to
define palette numbers. Which
color
is
assigned
to
each
palette number depends on
the
following
col
or
numbers
set
in palette registers:
141
H
(010,
09,
08)
Color number
for
register
No.O
143H
(010,09,08)
Color number
for
register No.l
145H
(010,
09,08)
Color number
for
register No.2
147H
(010,
09,08)
Color
number
for
register No.3 .
151
H
(010,
09,
08)
Color number
for
register No.4
153H
(010,
09,
08)
Color
numberfor
register No.5
155H
(010,
09,
08)
Color number
for
register No.6
157H
(010,
09,
08)
Color
numberfor
register No.7
The color numbers correspond
to
the colors (gradations
on
a monochrome display) listed in the
following
table:
Table 42
CRT
Color (RGB),
Monochrome,
Color No. Color
Gradation
0 Black
Black
t
Blue
7
2 Red
6
3
. Magenta
5
4
Green
4
5
Cyan
3
6
Yellow
2
7
White
1
(7) Display logic
chip
selector
A9
A7
A8
A4
AS
A6
G
YO~---4HL-J
GDC
RD
(IOOIt-IOFH)
LSI38
YI
~
__
--.
GDC
WO
'---t----WDC
cs
(IIOH-IIFH)
Y21----..,
ya~---,
A
B
C
Y4
YS
Y6
LSI88
IOWC------'
Fig. 90
VDC2 CS
(1201t-12FH)
VDC I cs (
180H-18FH)
LS670
GW(
1401t-14FH)
LS670GW(
160H-16FH)
VS
pon
1160-16FHI
(F
or
superimposel
As showns above, chip selection
is
accomplished by
an
LS138
ch
ip. The
ch
ip select outputs
are
gated
with
the
10WC and 10RC.
* V RAM
area
decoder
AI6--"'---,
A17
A
18
--.---...
AI9--,--_
IOACC
___________
~
Fig.
91
The
VRAM
output
is
set
low
when the
VRAM
occupies
an
area
of
COOOOH
through
EFFFFH.