Sharp MZ-5500 - Inlrrrupt Circuit

3. Interrupt circuit
:3 -1. Inter t-tApt (; H-C.t.(,.t
i) Circuit description
Two chips of 8259A PIC are used for the MZ-5500/5600 series, and, their
circuits are shown below.
A high on the interr " upt request line of the 8259A Interrupt Controller
applies an interrupt to device. As the state of the mask and priority of
the interrupt input is interrogated, the INT signal is issued to CPU.
Because the INTR line of the CPU is asynchronous, an interrupt request can
be accepted at any time unless it has been prohibited by the software.
When the CPU receives the interrupt, INTA i8 returned via the 8288 Bus
Controller. To which the 8259A forces the da ta bus high impedance. As the
second INTA is sent from the CPU via the 8288, an 8-bit vector is sent on
the data bus.
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Jr-1r
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sr
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Timings
cu
11.
IIrT
IIrTA
Fig.3-1 Interrupt circuit diagram and timings
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