8-6
Foe
clock, write clock circuit
1. Block diagram
4
MHz
_------11>
MFM
WCLK
(
FDC)
8MH.
">-----
~
(FDC)
B
LSI5T
2.
OpentiOMI description
Because
the
MFD interface circuit
is
used
under
the
1
MB
mode and
the
640
KB
mode
with
the
MZ
..
5600,
it
also
~
needs
to
change
the
FDC clock and write clock,
and
in
addition
to
it,
the
write clock has
to
be changed
into
the
MFM
and
FM
mode.
LS163
WCLK
High
Den
MFM LS163C
LS1630 drive
high
FOCI/>
ratio
width
0
0
0
1
1/8
250n5
8MHz
0
1 1 1
1/4
t
8MHz
1 0 0 0 1/16 t
4MKz
1 1 0 1 1/8
t
4MHz
8·7
MFO
drive select circuit
1. Block diagram
765A
FDe
.---------<p------
READY
lR~FDC
lNT
READY
SELO
usol----~
USll-----.-+-i
:::.~-+----+-~,
SELl
HDLD
SEL2
SEL8
SEL3---l.J--;:::::===W
(PSG)
2. Operational description
The FDC searches each drive
at
1 millisecond
to
check
the
ready state when
not
busy,
that
it, when waiting for a com-
mand.
If
the
ready state searched before does
not
coincide
~ with the ready state searched this time, it applied a
state
, transition. interrupt
to
the
CPU
to
inform removal
of
the
disk
from
the
FDD.
The
reason why
the
one-shot multivibrator circuit
is
seen
in
the select
of
the
drive 3
is
to
prevent
the
drive 3
front
bezel
lamp
as
if
activating even when
not
being accessed. So, it
-39-
-
MZ-5600
needs
to
take OR with
the
select signal from
the
1/0
port
so far as
the
drive 3
is
concerned.
3. Timings
• During search
USo
==~
______________
~L-
SELlCPSG)
__________
...:I""mS=--
___
--
__
_
"L"
~LD--------------------------
"L"
SELICFDD)
LJ
-One-shot
multlvlbrltOr
letup
time: 30
~S
• During access
usa
Ln.J
USI
LJ
SELlCPSG)
___
....
HDLD
-----'
L
SELlCFID)
~
____________________
~r-
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