Sharp MZ-5500 - Page 95

1
°The priority 3 among all has the highest priority.
(Be careful as it is
an opposite to tho~e of BASIC.)
°All priority must be different each other.
°lhe windm.J function i5 not e~fective when all priorities are set to 0 and
the address from the GDC is directly sent out.
°Window register (1/0 address 112H)
VMA*1 and VDS*2 are set to window.
8 bits
RNO
Bias
address,
low
For window 0
2
VMAOL
VHAOH
x x x x xlVDSO
VMA1L
~ .
VMAIH
x x x
x xlVDS1
VMA2L
VMA2H
x x x
x
xlvnS2
VMA3L
VMA3H
x x x
x xlVDS3
Bias address, high
3
J
VRAM
data select
Bias address, low For
windm.J
1
4
P
Bias address, high
5
J
VRAM
data select
7
6
Bias address, low For windöw
2
8
Bias
address, high
9
1
V RAH
data select
Bias
address, low For window 3
11
10
Bias address, high
.1
VRAM
data select
12
Fig.1,5-3
°Register setup
The priori ty register and the window register must be set after writing
each register number to RNO register. Since the RNO register increments by
one automatical1y each time written, only the first RNO may be written.
*1 VMA: See the paragraph discussing VHA.
*2 VDS: See the paragraph discussing VDS.
[Ex] To set the window register for the w{ndows 1 and 2:
1/0 address
110H
x x x x 0 1 0 0
I {-- RN 0 iss e t f 0 r VHA 1 L .
V1-"~ 11 J
VHA1H
x x x
x
xlvnSl
VMA2L
VMA2H
x x x
x xlVDS2
<--VMA and VDS are set in succession.
112H
112H
Fig.15-4