Sharp UP-600 - Page 40

4)-2. Pin configration
Pin
No.
Name Description
1 VSS GND
2 IOCS# Chip select input for control register
3 HWR# High write strobe input
4 LWR# Low write strobe input
5 RD# Read strobe input
6 MCS# Chip select input for VRAM
7 WAIT# WAIT output to MPU
8 VDD +5V
9 MPUCLK MPU clock
10 VSS GND
11 RESET# Reset input
12 MPUSEL 8/16-bit selective input to MPU
13 VSS GND
14 BHE# Bus high enable input
15 A0 MPU address bus 0
16 A1 MPU address bus 1
17 A2 MPU address bus 2
18 A3 MPU address bus 3
19 A4 MPU address bus 4
20 A5 MPU address bus 5
21 A6 MPU address bus 6
22 A7 MPU address bus 7
23 VDD +5V
24 VSS GND
25 VSS GND
26 A8 MPU address bus 8
27 A9 MPU address bus 9
28 A10 MPU address bus 10
29 A11 MPU address bus 11
30 A12 MPU address bus 12
31 A13 MPU address bus 13
32 N.C
33 N.C
34 VDD +5V
35 VSS GND
36 N.C
37 N.C
38 N.C
39 N.C
40 VSS GND
41 VSS GND
42 VDD +5V
43 D0 MPU data bus 0
44 D1 MPU data bus 1
45 D2 MPU data bus 2
46 D3 MPU data bus 3
47 D4 MPU data bus 4
48 D5 MPU data bus 5
49 D6 MPU data bus 6
50 D7 MPU data bus 7
51 VSS GND
52 VDD +5V
53 D8 MPU data bus 8
54 D9 MPU data bus 9
Pin
No.
Name Description
55 D10 MPU data bus 10
56 D11 MPU data bus 11
57 D12 MPU data bus 12
58 D13 MPU data bus 13
59 D14 MPU data bus 14
60 D15 MPU data bus 15
61 LCDENB LCD (ON/OFF) control signal input
62 M LCD AC-conversion signal output
63 VDD +5V
64 VSS GND
65 VSS GND
66 CP Display data transfer clock
67 LP Display data clutch pulse
68 FLM FIRST LINE MARKER signal output
69 UD0 LCD display data bus 0
70 UD1 LCD display data bus 1
71 UD2 LCD display data bus 2
72 UD3 LCD display data bus 3
73 N.C
74 N.C
75 N.C
76 N.C
77 VDD +5V
78 OSC1 Oscillation input terminal
79 OSC2 Oscillation output terminal
80 VSS GND