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Sinclair ZX Spectrum

Sinclair ZX Spectrum
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Chapter 4
26
Display mode register
The new display modes are selected using an 8-bit register accessed through input /
output (I/O) port $7FDF (where $ denotes the number is in hexadecimal). This register
is only accessible when the new display modes have been enabled by setting
configuration switch 6 to the on position. When enabled, the active display mode is
selected by writing to the output port. The port can also be read back, which is useful
since it provides a means for a program to determine whether the new display modes
functionality is available (the value read back should match the mode previously
selected).
The display mode register is structured as follows:
7
6
5
4
3
2
1
0
Line height:
00=Row, 01=Quad, 10=Dual, 11=Single
0=Basic colours, 1=Extra colours
0=Single byte colour, 1=Double byte colour
0=Standard border, 1=Enhanced border
0=Display bank 0, 1=Display bank 1
0=Shadow bank 0, 1=Shadow bank 1
0=Full cell, 1=Half cell
Each option can be combined with any of the others to form a large range of different
display modes.
The line height bits are used to select how many pixels form the height of a line, either
single line (1 pixel), dual line (2 pixels), quad line (4 pixels) or row (8 pixels).
The basic / extra colours bit selects between the conventional range of 15 colours
provided by the Spectrum and a larger palette of 64 colours.
The single / double byte colour bit selects whether the colour for each attribute
position is specified using single bytes or with two bytes. The interpretation of the
byte(s) depends upon the basic / extra colours bit and the full / half cell bit, and
determines whether the basic palette of 15 colours is available or the enhanced
palette of 64 colours.
The standard / enhanced border bit selects between the conventional border
functionality offered by the Spectrum and new functionality that allows additional
colours to be displayed, including the ability to flash the border.
The display bank 0 / 1 bit is used to specify which half of the 32K RAM fitted onboard
the SPECTRA interface contains the screen information that will be fetched when
generating the TV picture. This facility can be used to store a display screen and then

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