Skyworks Si5338 - Page 58

Si5338-RM
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Reset value = xxxx xxxx
Register 28.
Bit D7 D6 D5 D4 D3 D2 D1 D0
Name
P2DIV_IN[0] P1DIV_IN[2:0] XTAL_FREQ[1:0]
Type R/W R/W R/W R/W
Bit Name Function
7:6 Reserved Must only write a 00 to these bits.
5 P2DIV_IN[0]
This bit and Register 30[4:3] create a 3-bit field that selects the input to the P2
divider [reg30[4:3] reg28[5]] = P2DIV_IN[2:0].
000b: Clock from IN5,IN6 is input to P2 divider
011b: Clock from IN4 is input to P2
100b: No clock is input to P2
All other bit values are reserved.
4:2 P1DIV_IN[2:0]
These three bits are combined with Register 29[4:3] and create a 5-bit field that
selects the input to the P1 divider [reg29[4:3] reg28[4:2]] = P1DIV_IN[4:0].
00000b: Clock from IN1,IN2 selected
01010b: Clock from IN3 selected
10101b: Crystal oscillator selected
All other bit values are reserved and should not be written.
1:0 XTAL_FREQ[1:0]
Crystal Frequency Range.
Select Xtal Frequency that you are using. For more information on using crystals,
see “AN360: Crystal Selection Guide for Si533x/5x Devices”.
00b: 8–11 MHz
01b: 11–19 MHz
10b: 19–26 MHz
3: 26–30 MHz