Si5338-RM
60 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
Rev. 1.4 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 2021
Reset value = xxxx xxxx
Register 30.
BitD7D6D5D4D3D2 D1 D0
Name
PFD_IN_FB[2:0] P2DIV_IN[2:1] P2DIV[2:0]
Type R/W R/W R/W
Bit Name Function
7:5 PFD_IN_FB[2:0]
Selects the external input applied to the PFD feedback input. See also Register
48[7].
000b: P2DIV_IN (fbclk)
001b: P1DIV_IN (refclk)
010b: P2DIV_OUT (P2 divider output) selected
011b: P1DIV_OUT (P1 divider output) selected
100b: Reserved
101b: No Clock selected
110b: Reserved
111b: Reserved
4:3 P2DIV_IN[2:1]
These two bits and Register 28[5] create a 3-Bit field that selects the input to the
P2 divider [reg30[4:3] reg28[5]] = P2DIV_IN[2:0].
000b: Clock from IN5,IN6 is input to P2 divider
011b: Clock from IN4 is input to P2
100b: No clock is input to P2
All other bit values are reserved.
2:0 P2DIV[2:0]
Sets the value of the P2 the divider.
000b: Divide by 1
001b: Divide by 2
010b: Divide by 4
011b: Divide by 8
100b: Divide by 16
101b: Divide by 32
All other bit values are reserved.