Sony Model MV-700HR - Page 37

37
MV-700HR
IC103 BR24L16F-WE2
• IC Block Diagrams
– MAIN Board –
1
2
3
4
5
7
8
A0
A1
A2
GND
Vcc
WP
SCL
SDA
1kbit EEPROM ARRAY
7bit 8bit
ADDRESS
DECODER
SLAVE/ WORD
ADDRESS REGISTER
HIGH-VOLTAGE
GENERATOR
POWER SUPPLY
VOLTAGE DETECTOR
DATA
REGISTER
START STOP
ACK
CONTROL CIRCUIT
6
7bit
IC104 MBM29LV160BE70TN-FS1
Y-GATINGY-DECODER
ADDRESS LATCH
X-DECODER
STATE CONTROL
&
COMMAND
REGISTER
CHIP ENABLE/
OUTPUT ENABLE
LOGIC
CELL MATRIX
INPUT/OUTPUT
BUFFERS
LOW VCC
DETECTOR
TIMER FOR
PROGRAM/ERASE
PROGRAM
VOLTAGE
GENERATOR
ERASE
VOLTAGE
GENERATOR
DATA LATCH
RY/BY
BUFFER
DQ7
44
DQ15/A-1
45
VSS
46
BYTE
47
A16
48
DQ14
43
DQ6
42
DQ13
41
DQ5
40
DQ12
39
DQ4
38
VCC
37
DQ11
36
DQ3
35
DQ10
34
DQ2
33
DQ9
32
DQ1
31
DQ8
30
DQ0
29
CE
26
A0
25
VSS
27
OE
28
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
A18
16
A17
17
A7
18
A6
19
A5
20
NC
10
WE
11
RESET
12
NC
13
NC
14
15
A4
21
A3
22
A2
23
A1
24
RY/BY