Sony STR-V919 - Page 33

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IC1101 CAD8495AQ (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I/OPin Name
O
O
I
O
I
—
O
I
I
I
I
—
—
—
I
—
I
O
—
O
O
O
I
—
—
I
O
O
O
O
—
O
O
O
O
O
O
O
O
I
I
I
—
I
I
I
I
—
EIAJ data and parity flag output terminal (Not used)
Emphasis monitor output terminal (“H” = ON)
Input terminal for RC generator/oscillator
Output terminal for RC generator/oscillator
Microprocessor I/F select input terminal (CCB: H, @SUB@: L) (Connecting to GND)
Digital GND
Clock output select terminal ( “L” = 256fs, “H” = 128fs) (Connecting to GND)
Clock input select terminal ( “H” = 512fs, “L” = 384fs)
Test terminal (normally ground)
Test terminal (normally ground)
Reset input terminal
Digital power supply
No connect
Analog power supply
Input terminal for VCO generator band adjustment
Analog GND
Input terminal for VCO self running frequency set
External LPF for PLL is connected to this terminal
Digital power supply
CD subcode I/F and block sync output terminal (Not used)
CD subcode I/F and data output terminal (Not used)
CD subcode I/F and frame sync output terminal (Not used)
CD subcode I/F and shift clock input terminal for data reading (Not used)
Digital GND
Digital power supply
Crystal oscillator input terminal
Crystal oscillator output terminal
VCO and crystal oscillator clock output terminal (Not used)
256fs or 128fs clock output terminal (Select CLKMD terminal)
Error mute output terminal
Digital GND
Sampling frequency monitor output terminal
Sampling frequency monitor output terminal
Bit clock output terminal
Audio data output terminal
L, R clock output terminal (L-ch: “H”, R-ch: “L”)
Microprocessor I/F and subcode Q data sync output terminal (Not used)
Microprocessor I/F. When CCB/SUB is “L”, data output terminal (3-state output)
Microprocessor I/F. When CCB/SUB is “H”, data output terminal (high level open drain output) (Not used)
Microprocessor I/F. Data input terminal
Microprocessor I/F. Chip enable/latch input terminal
Microprocessor I/F. Clock input terminal
Digital power supply
Amplifier integrate data input terminal (Connecting to GND)
Amplifier integrate data input terminal (Connecting to GND)
Amplifier integrate data input terminal (Connecting to GND)
Amplifier integrate data input terminal
Digital GND
DOUT/V
EMPHA
RC1
RC2
CCB/SUB
D. GND
CLKMD
CLK
TEST1
TEST2
RESET
D. VDD
NC
A. VDD
R
A. GND
VCO IN
VCO
D. VDD
SBSY
PW
SFSY
SBCK
D. GND
D. VDD
XIN
XOUT
CLK OUT1
CLK OUT2
ERROR
D. GND
SUB1
SUB2
BCLK
DATA OUT
LRCK
LD/DQSY
SRDT
DO
DI/SWDT
CE/XLAT
CL/SCLK
D. VDD
DIN1
DIN2
DIN3
DIN4
D. GND
Description