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Advanced-control timers (TIM1/TIM8/TIM20) RM0440

1224/2126 RM0440 Rev 4

28.6.31 TIMx register map

TIMx registers are mapped as 16-bit addressable registers as described in the table below:

Bits 31:0 DMAB[31:0]: DMA register for burst accesses

A read or write operation to the DMAR register accesses the register located at the address

(TIMx_CR1 address) + (DBA + DMA index) x 4

where TIMx_CR1 address is the address of the control register 1, DBA is the DMA base

address configured in TIMx_DCR register, DMA index is automatically controlled by the DMA

transfer, and ranges from 0 to DBL (DBL configured in TIMx_DCR).

Table 266. TIMx register map and reset values

Offset Register

0x000

TIMx_CR1

Res.

DITHEN

UIFREMA

Res.

CKD

[1:0]

ARPE

CMS

[1:0]

DIR

OPM

URS

UDIS

CEN

Reset value

00 0000000000

0x004

TIMx_CR2

Res.

MMS[3]

Res.

MMS2[3:0]

Res.

OIS6

Res.

OIS5

OIS4N

OIS4

OIS3N

OIS3

OIS2N

OIS2

OIS1N

OIS1

TI1S

MMS

[2:0]

CCDS

CCUS

Res.

CCPC

Reset value

0 0000 0 000000000000000 0

0x008

TIMx_SMCR

Res.

SMSPS

SMSPE

Res.

[4:3]

Res.

SMS[3]

ETP

ECE

ETP

[1:0]

ETF[3:0]

MSM

TS[2:0]

OCCS

SMS[2:0]

Reset value

00 00 00000000000000000

0x00C

TIMx_DIER

Res.

TERRIE

IERRIE

DIRIE

IDXIE

Res.

TDE

COMDE

CC4DE

CC3DE

CC2DE

CC1DE

UDE

BIE

TIE

COMIE

CC4IE

CC3IE

CC2IE

CC1IE

UIE

Reset value

0000 000000000000000

0x010

TIMx_SR

Res.

TERRF

IERRF

DIRF

IDXF

Res.

CC6IF

CC5IF

Res.

SBIF

CC4OF

CC3OF

CC2OF

CC1OF

B2IF

BIF

TIF

COMIF

CC4IF

CC3IF

CC2IF

CC1IF

UIF

Reset value

0000 00 00000000000000

0x014

TIMx_EGR

Res.

B2G

COMG

CC4G

CC3G

CC2G

CC1G

Reset value

000000000

0x018

TIMx_CCMR1

Input Capture

mode

Res.

IC2F[3:0]

IC2

PSC

[1:0]

CC2

[1:0]

IC1F[3:0]

IC1

PSC

[1:0]

CC1

[1:0]

Reset value

0000000000000000

TIMx_CCMR1

Output

Compare mode

Res.

OC2M[3]

Res.

OC1M[3]

OC2CE

OC2M

[2:0]

OC2PE

OC2FE

CC2

[1:0]

OC1CE

OC1M

[2:0]

OC1PE

OC1FE

CC1

[1:0]

Reset value

0 00000000000000000

0x01C

TIMx_CCMR2

Res.

OC4M[3]

Res.

OC3M[3]

OC4CE

OC4M

[2:0]

OC4PE

OC4FE

CC4

[1:0]

OC3CE

OC3M

[2:0]

OC3PE

OC3FE

CC3

[1:0]

Reset value

0 00000000000000000

TIMx_CCMR2

Res.

IC4F[3:0]

IC4

PSC

[1:0]

CC4

[1:0]

IC3F[3:0]

IC3

PSC

[1:0]

CC3

[1:0]

Reset value

0000000000000000

Brand	ST
Model	STM32G491
Category	Microcontrollers
Language	English

ST STM32G491 User Manual

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ST STM32G491 Specifications

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