ST STM32G491 User Manual

RM0440 Rev 4 1361/2126
RM0440 General-purpose timers (TIM15/TIM16/TIM17)
1445
Figure 453. Capture/compare channel (example: channel 1 input stage)
The output stage generates an intermediate waveform which is then used for reference:
tim_ocxref (active high). The polarity acts at the end of the chain.
Figure 454. Capture/compare channel 1 main circuit
MSv62322V1
0
1
ICPS[1:0]
tim_ti1f_ed
To the slave mode controller
tim_ti1_fp1
11
01
CC1S[1:0]
tim_ic1
tim_ti2fp1
tim_trc
(from slave mode
controller)
10
tim_ic1f
0
1
TIMx_CCER
CC1P/CC1NP
TIMx_CCMR1
Edge
detector
tim_ti1f_rising
tim_ti1f_falling
Filter
downcounter
ICF[3:0]
Divider
/1, /2, /4, /8
TIMx_CCMR1
TIMx_CCER
tim_ti2f_rising
(from channel 2)
tim_ti2f_falling
(from channel 2)
tim_ti1f
f
DTS
CC1E
TIM_CH1
tim_ti1_in[15..1]
tim_ti1_in0
TIMx_TISEL
TI1SEL[3:0]
MSv63030V1
CC1E
compare shadow register
Comparator
Capture/compare preload register
Counter
IC1PS
CC1S[0]
CC1S[1]
Capture
Input mode
CC1S[0]
CC1S[1]
Output mode
UEV
OC1PE
(from time
base unit)
Compare
transfer
APB Bus
16/32-bit
MCU-peripheral interface
TIMx_CCMR1
OC1PE
CNT>CCR1
CNT=CCR1
TIMx_EGR
CC1G

ST STM32G491 Specifications

General

Brand	ST
Model	STM32G491
Category	Microcontrollers
Language	English