RM0440 Rev 4 935/2126
RM0440 High-resolution timer (HRTIM)
1083
Synchronization input
The HRTIM can be synchronized by external sources, as per the programming of the
SYNCIN[1:0] bits in the HRTIM_MCR register:
• 00: synchronization input is disabled
• 01: reserved configuration
• 10: the On-chip timer TRGO output connected to hrtim_in_sync[2] input (refer to
Table 207 for details).
• 11: a positive pulse on the HRTIM_SCIN input pin (hrtim_in_sync[3])
This bitfield cannot be changed once the destination timer (master timer or timing unit) is
enabled (MCEN and/or TxCEN bit set).
The HRTIM_SCIN input is rising-edge sensitive. The timer behavior is defined with the
following bits present in HRTIM_MCR and HRTIM_TIMxCR registers (see Table 237 for
details):
• Synchronous start: the incoming signal starts the timer’s counter (SYNCSTRTM and/or
SYNCSTRTx bits set). TxCEN (MCEN) bits must be set to have the timer enabled and
the counter ready to start. In continuous mode, the counter does not start until the
synchronization signal is received.
• Synchronous reset: the incoming signal resets the counter (SYNCRSTM and/or
SYNCRSTx bits set). This event decrements the repetition counter as any other reset
event.
The synchronization events are taken into account only once the related counters are
enabled (MCEN or TxCEN bit set). A synchronization request triggers a SYNC interrupt.
Note: A synchronized start event resets the counter if the current counter value is above the active
period value.
The effect of the synchronization event depends on the timer operating mode, as
summarized in Table 237.
.
Table 237. Effect of sync event versus timer operating modes
Operating mode
SYNC
RSTx
SYNC
STRTx
Behavior following a SYNC reset or start event
Single-shot
non-retriggerable
01
Start events are taken into account when the counter is stopped and:
– once the MCEN or TxCEN bits are set
– once the period has been reached.
A start occurring when the counter is stopped at the period value resets the
counter. A reset request clears the counter but does not start it (the counter
can solely be re-started with the synchronization). Any reset occurring
during the counting is ignored (as during regular non-retriggerable mode).
1X
Reset events are starting the timer counting. They are taken into account
only if the counter is stopped and:
– once the MCEN or TxCEN bits are set
– once the period has been reached.
When multiple reset requests are selected (from HRTIM_SCIN and from
internal events), only the first arriving request is taken into account.
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