Supermicro SuperServer 4029GP-TRT - Page 77

Chapter 6: UEFI BIOS
77

CPU Conguration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.

Processor Conguration
The following CPU information will be displayed:
• Processor BSP Revision
• Processor Socket
• Processor ID
• Processor Frequency
• Processor Max Ratio
• Processor Min Ratio
• Microcode Revision
• L1 Cache RAM
• L2 Cache RAM
• L3 Cache RAM
• Processor 0 Version/Processor 1 Version
Trace Hub ACPIBAR Base
Select Enable to set PCH_TRACE_HUB_FW_BASE_ADDRESS in the MSR_TRACE_
HUB_8TH_ACPIBAR_BASE (MSR 80h). The options are Disable and Enable.
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.
Core Disable Bitmap (Hex)

0 to enable all cores available in the processor. Enter FFFFFF to disable all CPU cores in
the processor. Enter bit0 to disable CPU Core 0. Enter bit1 to disable CPU Core 1. Please
note that the maximum of 24 CPU cores are currently available in each CPU package. The
default setting is 0.
Intel Enhanced Debug
This feature allows the user to determine how Intel Enhanced Debug support to be implemented
in this system. The options are 4096K and Disable.