120 Appendices TB9100 Reciter Service Manual
© Tait Electronics Limited January 2006
TDI
DSDI
H17 I/P Input serial data for the scan chain logic
Input serial data for the development port and determines the
operating mode of the development port at reset
TDO
DSDO
G17 O/P Output serial data for the scan chain logic
Output serial data for the development port
TEA
D1 I/O Transfer Error Acknowledge
TEXP N3 O/P Timer Expired
TGATE1
CD1
PC10
K19 I/O Timer 1/timer 2 gate signal
Carrier detect modem line for SCC1
General-purpose I/O port C, bit 10
TGATE2
PC8
I/O Timer 3/timer 4 gate signal
General-purpose I/O port C, bit 8
TIN1
L1RCLKA
BRGO1
CLK1
PA7
M19 I/O Timer 1 external clock
Receive clock for the serial interface TDMa
Output clock of BRG1
Clock input 1 for SCCs and SMCs
General-purpose I/O port A, bit 7
TIN2
L1TCLKA
BRGO2
CLK3
PA5
N18 I/O Timer 2 external clock input
Transmit clock for the serial interface TDMa
Output clock of BRG2
Clock inputs for SCCs and SMCs
General-purpose I/O port A, bit 5
TIN3
BRGO3
CLK5
PA3
P17 I/O Timer 3 external clock input
Output clock of BRG3
Clock inputs for SCCs and SMCs
General-purpose I/O port A, bit 3
TIN4
BRGO4
CLK7
PA1
T19 I/0 Timer 4 external clock input
BRG4 output clock
Clock input for SCCs and SMCs
General-purpose I/O port A, bit 1
TMS G18 I/P Controls the scan chain test mode operations
TOUT1
CLK2
PA6
M17 I/O Timer 1 output
Clock input for SCCs and SMCs
General-purpose I/O Port A Bit 6
TOUT2
CLK4
PA4
P19 I/O Timer 2 output
Clock inputs for SCCs and SMCs
General-purpose I/O Port A, bit 4
TRST G19 I/P Test reset for the JTAG scan chain logic
TS
F3 1/0 Transfer Start
TSIZ0
REG
B9 I/O Transfer Size 0
Register
TSIZ1 C9 I/O Transfer Size 1
TxD1
PA14
D17 I/O SCC1 Transmit Data
General-purpose I/O port A, bit 14
Table 8.10 MPC859T Port Assignments (Continued)
Pin Name Pin No. Type Function