Theory of Operation—2465B/2467B Service
control register U2865 by the ROS2 strobe. Bit Q
4
( WRITE ), along with the ROS2 and the R/ W DLYD
sig-
nal are applied to the RAM enabling circuitry and deter-
mine when new character information will be written into
the Character RAM. With U2865 loaded with the mode
data,
a final ROS1 strobe clocks the eighth bit of charac-
ter data from U2960 to U2860 on the negative edge, and
the positive edge of the strobe clocks the eighth character
address bit into U2960.
With control bit Q
4
from U2865 LO, the outputs of
U2860 are enabled and the eight bits of character data
(CDO through CD7) are written in parallel into the Charac-
ter RAM at the location selected by the eight-bit address
from U2960. Register U2960 is enabled only when the
Readout is not displaying characters (the REST signal at
pin 15 of U2960 is HI).
The character data register U2860 also provides a
means for the Microprocessor to read data from the
Character RAM for partial verification of Readout circuit
operation (during the power-up tests). The eight bits of
parallel data from the Character RAM location selected by
character address register U2960 are loaded into U2860
by setting bit Q
3
of mode control register U2865 LO.
Inverter U2965C converts the LO to a HI and applies it to
character-register U2860 at pin 1. The HI on pin 1, in com-
bination with the fixed HI on pin 19 of U2860, switches the
character register to the Parallel Load mode. The next
positive transition of the ROS1 strobe loads the eight data
bits placed on the CDO through CD7 bus lines into the
register in parallel. Bit Q
3
is then returned HI, and the next
positive transition of the ROS1 strobe shifts the Q
A
bit to
pin 8 (Q
A
'), the RO DO (readout data out) line. Seven
more ROS1 strobes shift the remaining seven bits of char-
acter data out onto the RO DO line to Status Buffer
U2220 (diagram 2) to be
read,
one at a time, by the pro-
cessor.
Character RAM
Character RAM U2920 provides temporary storage of
the readout character selection data. This character data
is organized as 256 eight-bit words that define the charac-
ter that should be displayed at any given readout position
on the crt. Cursor information is also stored in U2920
when cursors are to be displayed.
RAM locations may be addressed either from the
Readout I/O stage by character address register U2960,
as previously described, or by the Character Counter
stage.
Each of the following 128 address locations
corresponds to a specific readout location on the crt.
Address locations 0 through 63 correspond to the first and
fourth readout lines and 128 through 191 to the second
and third readout lines. The next 128 address locations
store cursor information. Address locations 64 through 127
correspond to the first and fourth readout line storage and
192 through 255 to the second and third readout line
storage. The eight bits of data written to one of these
locations from the Readout I/O stage is a code that
identifies the specific character (or cursor segment) that
should be displayed at the associated crt location. After
the display data is written into the RAM, the Character
Counter is allowed to address the RAM, incrementing
through the RAM address
field.
The eight-bit character
codes for each display location are output to Character
ROM U2930 in sequence.
Character Counter
The Character Counter stage consists of two four-bit
counters (both within U2940) cascaded together to form
an eight-bit counter and tristate buffer U2935 which drives
the RAM address lines.
As the Character Counter addresses each RAM loca-
tion (the counter also determines the character screen
location), a sequence of "dot display cycles" is performed
in which the individual dots that make up the character are
positioned on the crt and turned on. The EOCH (end of
character) signal applied to U2855A prevents the counter
from incrementing until all dots of the character have been
displayed.
As the last dot of a character is addressed, the
EOCH bit at pin 2 of U2855A goes LO. The next GETDOT
pulse increments U2940 (via U2855A), and the next RAM
location is addressed to start the display of the next char-
acter. Space characters have the EOCH bit set LO for the
first "dot" of the character and merely advance the
Counter to the next character address without displaying
any dots. See the Character ROM description for further
explanation of the EOCH bit.
Character ROM
Character ROM U2930 contains the horizontal and
vertical dot-position information for all of the possible char-
acters (or cursor segments) that may be displayed. The
eight bits of character data from the Character RAM are
applied to the eight most-significant address inputs (A4
through A11) of the Character ROM and select a block of
dot-positioning data unique to the character to be
displayed.
The Dot Counter increments the four least-
significant address lines (AO through A3), causing the
ROM to output a sequence of eight-bit words, each
defining a dot position for the selected character.
The three least-significant bits of a ROM dot-data word
(DDO through DD2) select one of eight horizontal positions
for the dot within an eight-by-sixteen character matrix (see
Figure 3-6). The next four bits (DD3 through DD6) define
the vertical position of the dot within the matrix. These
dot-data bits are applied to the Horizontal and Vertical
Character DACs, where they are converted to the analog
voltages used to position the dot on the crt.
3a-29
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