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Tektronix 7834 - Page 95

Tektronix 7834
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The
analog
outputs
of
the
Column
Data
Switch
and
Row
Data Switch
are
connected
to the
Column
Decoder
and
Row
Decoder
stages
respectively
.
These
stages
sense
the
magnitude
of the
analog
voltage
input
and
produce
an
out
put
current
on
one
of ten
lines
.
The
outputs
of
the
Column
Decoder
stage
are
identified
as
C-1
through
C-10
(column
1
through
10)
corresponding
to
the
encoded
column
informa-
tion
.
Likewise, the
outputs
of the
Row
Decoder
stage
are
identified
as
R-1
through
R-10
(row
1
through
10)
corres-
ponding
to the
encoded
row
information
.
The
primary
function
of the
row
and
column
outputs
is
to
select
a
character
from
the
Character
Selection
Matrix
(Fig
.
3-27)
to be
produced
by
the
Character
Generator
stage
.
These
outputs
are
also
used
at
other
points
within
the system
to
indicate
when
certain
information
has
been
encoded
.
One
such
stage
is
the
Zeros
Logic
and
Memory
.
During
time-slot
1
(TS-1
),
this
stage
checks
if
zero-adding
or
prefix-shifting
information
has
been
encoded
by
the
plug-in
unit,
and
stores
it
in
the
memory
until
time-slots
5,
6,
or 8
.
After
storing
this
information,
it
triggers
the
Display-Skip
Genera-
tor
stage
so
that
there
is
no
display
during
time-slot
1
(as
defined
by
Standard
Readout
Format
;
see
Table
3-4)
.
When
time-slots
5, 6,
and
8
occur,
the
memory
is
addressed
and
any
information
stored there
during
time-slot
1
is
transferred
to the
input
of
the
Column
Decoder
stage
to
modify
the
analog
data
during
the
applicable time-slot
.
Also,
the
Zeros
Logic
and
Memory
stage
produces
the
IDENTIFY
function
.
When
time-slot
1
is
encoded
for
IDENTIFY
(column
10,
row
3),
this
stage
produces
an out-
put
level,
which
connects
the
Column
Data Switch
and
Row
Data
Switch
to a
coding
network
within
the
Readout
System
.
Then,
during
time-slots
2
through
9,
an
analog
current
output
is
produced
from
the
Column
Data
Switch
and
Row
Data
Switch,
which
addresses
the correct points
in
the
Character
Selection
Matrix
(Fig
.
3-27) to display the
word
"IDENTIFY"
on
the
crt
.The
Zeros
Logicand
Memory
stage
is
reset
after
each
word by
the
Word
Trigger pulse
.
The
Character
Generator
stages
produce
the characters
which
are
displayed
on
the
crt
.
Any
of the
50
characters
shown on
the
Character
Selection
Matrix
of
Figure
3-27
can
be
addressed
by
proper
selection
of the
column
and row
currents
.
Only
one
character
is
addressable
in
any one
time-
slot
;
a
space
can
be
added
into
the
displayed
word
by
the
Decimal
Point
Logic
and
Character
Position
Counter
stage
when
encoded
by
the
plug-in
.
The
latter
stage
counts
the
number
of
characters
generated
and
produces
an
output
current
to
step
the display
one
character position to the
right
for
each
character
.
In
addition, the character
position
is
advanced once
during
each
of
time-slots
1,
2,
and
3,
whether
a
character
is
generated
during
these
time-slots
or
not
.
This action
fixes
the
starting
point
of
the
standard-
format
display
such
that the
first
digit
of the
scaling
factor
always
starts at
the
same
point
within
each
word
regardless
of the
information
encoded
in
time-slot
1, 2,
or
3
preceding
this
digit
.
Also,
by
encoding
row
10
and
column
0
during
any
time-slot,
a
blank space
can
be
added
to
the
display
.
Theory
of
Operation--7834
Decimal
points
can
be
added
to the display
at
any
time
by
addressing
the
appropriate
row
and
column
.
(See
Character
Selection
Matrix,
Fig
.
3-27, for location of
decimal
points
.)
The
Decimal
Point
Logic
and
Character
Position
Counter
stage
is
reset after
each
word
by
the
Word
Trigger
pulse
.
The
Format
Generator
stage
provides
the
output
signals
to
the
vertical
and
horizontal deflection
systems
of the
instru-
ment
to
produce
the character display
.
The
binary
Channel
Address
Code
from
the
Channel
Counter
stage
is
connected
to
this stage, so
that the display
from
each
channel
is
posi-
tioned
to the area
of
the
crt
associated
with
the
plug-in
and
channel
originating
the
word
(see
Fig
.
3-26)
.
The
position-
ing
current
or
decimal
point
location
current
generated
by
the
Decimal
Point Logic
and
Character
Position
Counter
stage
is
added
to the
Horizontal
(X)
signal at
the
input
to
the
Format
Generator
stage
to
provide
horizontal
position-
ing
of the characters
within
each
word
.
The
X-
and
Y-
Readout
signals
are
connected
to
the
Horizontal
Amplifier
and
Vertical
Amplifier
through
the X-
and
Y-Buffer
stages
.
The
Word
Trigger
stage
produces
a
trigger
from
the End-of-
Word
pulse
generated
by
the
-
Time-Slot
Counter
stage
after
the
tenth
time-slot
.
This
Word
Trigger
pulse
advances
the
Channel
Counter
to display the
information
from
the
next
channel
or
plug-in
.
It
also
provides
a
reset
pulse to the
Zeros
Logic
and
Memory
stage,
and
the
Decimal
Point Logic
and
Character
Position
Counter
stage
.
This
Word
Trigger
stage
can
also
be
advanced
to
jump
a
complete
word
or
a
portion
of
a
word
when
a
Jump
Command
is
received
from
the
Row
Data
Switch
stage
.
Timer
The
timer
stage
establishes
the
timing
sequence
for
all
cir-
cuits
within
the
Readout
System
.
This
stage
produces
7
time-related
output
waveforms
(see
Fig
.
3-30)
.
The
triangle
waveform
produced
at
pin
6
forms
the
basis
for
the
remain-
ing
signals
.
The
basic
period
of
this
triangle
waveform
is
about
250
microseconds
as
controlled
by
RC
network
R3434
and
C3434
.
The
triangle
waveform
is
clipped
and
amplified
by
U3433
to
form
the
trapezoidal
output
signal
at
pin
10
.
The
amplitude
of
this
output
signal
is
exactly 15
volts
as
determined
by
U3433
(exact
amplitude
necessary
to
accurately
encode
data
in
plug-in
units
;
see
Encoding
the
Data)
.
The
trigger
output
at
pin
5
provides
the
switching
signal
for
the Time-Slot
Counter
and
Word
Trigger
stages
.
The
signals
at
pins
12, 13, 14,
and
16
are
produced
only
when
the
triangle
waveform
is
on
its
negative slope
and
the
trapezoidal
waveform
has
reached
the
lower
level
.
The
tim-
ing
sequence
of these
waveforms
is
important
to the opera-
tion
of
the
Readout
System
(see
expanded
waveforms
in
Fig
.
3-31)
.
The
Z-Axis
Inhibit
command
at
pin 14
is
pro-
duced
first
.
This negative-going
signal
provides
a
blanking
pulse
to the
Z-Axis
Logic
stage
(see
diagram
4)
to
blank
the
crt
before
the display
is
switched
to
the
Readout
System
.
3-
3
9

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