6.4 Schematic
Figure 6-9 through Figure 6-11 illustrate the schematics.
VSS
VSS
VSS
VSS
GND
SRP SRN
5P
20.0
R4
TP15
100
R14
100
R15
100pF
C13
0.1uF
C19
TP8
0.001
R25
t°
RT1
100
R21
100
R23
VC4
VC3
VC2
VC1
SRP
SRN
TS1
TS2
PACK
DSG
PCHG
CHG
FUSE
NT1
BQ76922RSNT
BAT
1
VC5
2
VC4A
3
VC4B
4
VC3A
5
VC3B
6
VC2
7
VC1
8
VC0
9
VSS
10
SRP
11
SRN
12
TS1
13
TS2
14
REG18
15
ALERT
16
SCL
17
SDA
18
CFETOFF
19
DFETOFF
20
RST_SHUT
21
REG1
22
REGIN
23
BREG
24
FUSE
25
PDSG
26
PCHG
27
LD
28
PACK
29
DSG
30
CHG
31
CP1
32
PAD
33
U1
SDA
40V
D1
100
R1
1P
2P
3P
SDA2
4P
SCL2
TP19
TP20
BAT-
GND
20.0
R2
TP2
VSS
PDSG
VSS
VC0
VC5
1 2
3 4
5 6
7 8
J6
HDQ
REG1
EXTTS2
EALERT
10k
R11
10k
R12
1
3
2,4
Q1
BCX5616TA
200
R3
2.2uF
C18
1uF
C16
BAT-
1P
2P
3P
4P
SCL
TP6
TP12
VSS
GND
TP16
0.47uF
C1
41
32
S1
0
R9
VSS
GND
TP17
VSS
GND
TP18
PGND
LD
1
2
3
J3
10k
R22
100k
R16
100k
R17
100k
R24
1 2
3 4
5 6
7 8
9 10
11 12
J4
TP10
TS1 TS2
SCLSDA
TP14TP13
HDQ
0.22uF
C4
20.0
R5
20.0
R6
20.0
R7
0.22uF
C5
0.22uF
C7
0.22uF
C8
0.22uF
C9
0.22uF
C10
20.0
R8
VSS
PGND
PACK-
SDA
SCL
4
1
2
3
J5
E2E1
TS2
DFETOFF
ALERT
CFETOFF
RST-SHUT
REGIN
REG1
VSS
5
4
1
2
3
6
7
8
J2
1
2
U2
1
2
U3
EXTTS2
EALERT
EDFETOFF
VSS
REG1
ECFETOFF
CHG
DSG
PACK
LD
PCHG
PDSG
FUSE
VSS VSS
0.01uF
C1210k
R13
VSS
TP9
TP5
0.022uF
C11
VSS
TP7
REG1
TP11
100pF
C2
VSS
1uF
C3
VSS
TP4
TP1
Input
22V 10A
5P
5P
CD
10k
R18
10k
R19
REG1
WAKE
4
1
3
2
S2
10k
R20
REG1
1
2
3
4
5
6
7
8
9
10
J7
RESET
TP3
1
2
3
4
5
6
J1
BAT+
RST_SHUT
EREGIN
BREG
REGIN
DFETOFF
CFETOFF
40V
D2
0.01uF
C17
REG18
ALERT
CP1BAT
BAT-
0.1uF
C14
0.1uF
C15
VSS VSS
1uF
C6
VSS
10M
R10
VSS
Figure 6-9. Schematic Diagram Monitor
www.ti.com BQ76922EVM Circuit Module Physical Construction
SLVU957A – SEPTEMBER 2019 – REVISED NOVEMBER 2021
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BQ76922EVM Evaluation Module 29
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