4.1.1 Straps for PHY Address
Table 4-3. PHY Strap Table
PIN NAME STRAP NAME PIN NO. DEFAULT
RX_D0 PHY_ADD[1:0] 33 00
PHY_ADD1 PHY_ADD0
MODE 0 0 0
MODE 1 0 1
MODE 2 1 0
MODE 3 1 1
RX_D1 PHY_ADD[3:2] 34 00
PHY_ADD3 PHY_ADD2
MODE 0 0 0
MODE 1 0 1
MODE 2 1 0
MODE 3 1 1
4.1.2 Strap for DP83869 Functional Mode Selection
Table 4-4. Functional Mode Strap Table
PIN NAME STRAP NAME PIN NO. DEFAULT
OPMO
DE_2
OPMO
DE_1
OPMO
DE_0
FUNCTIONAL MODES
JTAG_TDO/
GPIO_1
OPMODE_0 22 0
0 0 0
RGMII to Copper( 1000Base-T/
100Base-TX/10Base-Te)
0 0 1 RGMII to 1000Base-X
RX_D3 OPMODE_1 36 0
0 1 0 RGMII to 100Base-FX
0 1 1 RGMII-SGMII Bridge Mode
RX_D2 OPMODE_2 35 0
1 0 0 1000Base-T to 1000Base-X
1 0 1 100Base-T to 100Base-FX
1 1 0
SGMII to Copper( 1000Base-T/
100Base-TX/10Base-Te)
1 1 1 JTAG for boundary scan
4.1.3 Straps for RGMII/SGMII to Copper
Table 4-5. Copper Ethernet Strap Table
PIN NAME STRAP NAME PIN NO. DEFAULT
LED_0 ANEG_DIS 47 0
ANEG_
DIS
ANEGS
EL_1
ANEGS
EL_0
FUNCTION
0 0 0
Auto-negotiation, 1000/100/10
advertised, Auto MDI-X
0 0 1
Auto-negotiation, 1000/100
advertised, Auto MDI-X
LED_1 ANEGSEL_0 46 0
0 1 0
Auto-negotiation, 100/10 advertised,
Auto-MDI-X
0 1 1 Reserved (JTAG for boundary scan)
1 0 0 Forced 1000 M, master, MDI mode
LED_2 ANEGSEL_1 45 0
1 0 1 Forced 1000 M, slave, MDI mode
1 1 0
Forced 100 M, full duplex, MDI
mode
1 1 1
Forced 100 M, full duplex, MDI-X
mode
RX_CTRL MIRROR_EN 38 0
0 Port Mirroring Disabled
1 Port Mirroring Enabled
www.ti.com Configuration Options
SNLU237A – SEPTEMBER 2018 – REVISED JANUARY 2024
Submit Document Feedback
DP83869 Evaluation Module 11
Copyright © 2024 Texas Instruments Incorporated