2.2 Bootloader Device Configuration
2.3 PLL Multiplier Selection
2.4 Watchdog Module
Bootloader Device Configuration
At reset, any 28x™ CPU-based device is in 27x™ object-compatible mode. It is up to the application to
place the device in the proper operating mode before execution proceeds.
On the 28x devices, when booting from the internal boot ROM, the device is configured for 28x operating
mode by the boot ROM software. You are responsible for any additional configuration required.
For example, if your application includes C2xLP™ source, then you are responsible for configuring the
device for C2xLP source compatibility prior to execution of code generated from C2xLP source.
The configuration required for each operating mode is summarized in Table 2-1 .
Table 2-1. Configuration for Device Modes
C2xLP Source
C27x Mode (Reset) 28x Mode Compatible Mode
OBJMODE 0 1 1
AMODE 0 0 1
PAGE0 0 0 0
M0M1MAP
(1)
1 1 1
Other Settings SXM = 1, C = 1, SPM = 0
(1)
Normally for C27x compatibility, the M0M1MAP would be 0. On these devices, however, it is tied off
high internally; therefore, at reset, M0M1MAP is always configured for 28x mode.
The boot ROM does not change the state of the PLL. Note that the PLL multiplier is not affected by a
reset from the debugger. Therefore, a boot that is initialized from a reset from Code Composer Studio™
may be at a different speed than booting by pulling the external reset line ( XRS) low.
When branching directly to flash, M0 single-access RAM (SARAM), or one-time-programmable (OTP)
memory, the watchdog is not touched. In the other boot modes, the watchdog is disabled before booting
and then re-enabled and cleared before branching to the final destination address.
SPRU722C – November 2004 – Revised October 2006 Bootloader Features 19
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