SPIA_GetWordData
Yes
NoData
Received
?
Send dummy
character
Read LSB
Data
Received
?
No
Yes
Read MSB
Return MSB:LSB
Send dummy
character
2.18 I
2
C Boot Function
280x
Master
SDAA
SCLA
SDA SCL
SDA
SCL
I
2
C
EEPROM
Slave Address
0x50
I
2
C Boot Function
Figure 2-21. Overview of SPIA_GetWordData Function
The I
2
C bootloader expects an 8-bit wide I
2
C-compatible EEPROM device to be present at address 0x50
on the I
2
C-A bus as indicated in Figure 2-22 . The EEPROM must adhere to conventional I
2
C EEPROM
protocol, as described in this section, with a 16-bit base address architecture.
Figure 2-22. EEPROM Device at Address 0x50
If the download is to be performed from a device other than an EEPROM, then that device must be set up
to operate in the slave mode and mimic the I
2
C EEPROM. Immediately after entering the I
2
C boot
function, the GPIO pins are configured for I
2
C-A operation and the I
2
C is initialized. The following
requirements must be met when booting from the I
2
C module:
• The input frequency to the device must be between 14 MHz and 24 MHz
• The EEPROM must be at slave address 0x50
42 Bootloader Features SPRU722C – November 2004 – Revised October 2006
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