Bootloader Code Listing (V3.0)
// If the KeyValue was invalid, abort the load
// and return the flash entry point.
if (CAN_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT;
ReadReservedFn();
EntryAddr = GetLongData();
CopyData();
return EntryAddr;
}
//#################################################
// void CAN_Init(void)
//----------------------------------------------
// Initialize the CAN-A port for communications
// with the host.
//----------------------------------------------
void CAN_Init()
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since, only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents. This is
especially true while writing to a bit (or group of bits) among bits 16 - 31 */
struct ECAN_REGS ECanaShadow;
EALLOW;
/* Enable CAN clock */
SysCtrlRegs.PCLKCR0.bit.ECANAENCLK=1;
/* Configure eCAN-A pins using GPIO regs*/
GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // GPIO30 is CANRXA
GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // GPIO31 is CANTXA
/* Configure eCAN RX and TX pins for eCAN transmissions using eCAN regs*/
ECanaRegs.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANRIOC.bit.RXFUNC = 1;
/* Enable internal pullups for the CAN pins */
GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;
/* Asynch Qual */
GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;
/* Initialize all bits of 'Master Control Field' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
// RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.
/* Clear all RMPn bits */
ECanaRegs.CANRMP.all = 0xFFFFFFFF;
/* Clear all interrupt flag bits */
ECanaRegs.CANGIF0.all = 0xFFFFFFFF;
SPRU722C – November 2004 – Revised October 2006 Bootloader Code Overview 83
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