TR-Electronic 110 Series - Repeat with 1-3 Low Clocks

Printed in the Federal Republic of Germany  TR-Electronic GmbH 2005, All Rights Reserved
07/30/2020 TR - ECE - BA - DGB - 0039 - 14 Page 101 of 107
8.2.1.5 Repeat with 1-3 low clocks
With the programming "Repeat with 1-3 low clocks" with the second clock
sequence the stored position value is transferred again and serves for recognition of
transmission errors. According to the selection one up to max. three break clocks can
be inserted before the second clock sequence is starting.
A further clock sequence transfers a new updated data word. So a data word is
always repeated only once.
The data capacity at the transmission is adjusted with the parameter Number of
data bits. The data transmission begins with the most significant bit (MSB) and
contains the position bits (P).
Related to a certain number of clocks, the data can be shifted arbitrarily by the
parameter Number of data bits. The data can be transmitted right-justified or
left-justified, with leading "zeros" and without leading "zeros". Leading "zeros" are
produced if the parameter Number of data bits is programmed larger, as it would
be necessary from the total measuring length.
Example
Measuring system:
- 1024 steps/revolution (10 bits)
- 4096 revolutions (12 bits)
- --> Total number of steps = 22 bits
- Code: Binary or Gray
- Selection: Repeat with 2 low clocks
Output right-justified
Programmed Number of data bits = 24
MSB
LSB
MSB
LSB
1
2
3 – 24
25
26
1
2
3 – 24
25
26
0 0 P 2
21
– P 2
0
0 0 0 0 P 2
21
– P 2
0
0 0
Data word 1 Data word 2
Output left-justified
Programmed Number of data bits = 22
MSB
LSB
MSB
LSB
1 – 22
23
24
1 – 22
23
24
P 2
21
– P 2
0
0 0 P 2
21
– P 2
0
0 0
Data word 1 Data word 2