ODIN-W2 series - System integration manual
UBX-14040040 - R20 System description Page 16 of 43
C1-Public
SMI (MDC/MDIO management interface):
The two-wire SMI is used to configure PHY chip. It uses a clock line and a data line to setup the internal
registers on PHY chip.
A pull up resistor of 1.5 kΩ must be added to MDIO pin.
MAC to MAC connection:
If you connect the ODIN-W2 series module using a direct MAC to MAC connection, the SMI interface
can be left unconnected. Depending on the routing of the RMII interface on the host PCB, termination
resistors might also be needed.
An external 50 MHz oscillator is needed while running a MAC to MAC connection.
MAC to PHY connection:
If you connect the ODIN-W2 series module to an external PHY circuit, both the RMII and SMI interfaces
must be connected. The default PHY address (0x1) must be configured on the PHY side. Follow the
recommendations from the selected PHY chip for implementation details.
An example of a PHY implementation is shown in Figure 3. The PHY KSZ8081 is the recommended
PHY that is used on the EVK-ODIN-W2.
Figure 3: Example schematic RMII to PHY
1.5.3 Mbed Data communication interfaces
Through the Mbed software, the ODIN-W2 series module can be used with a wide range of interfaces
and is not limited to the pinout used by the serial port service.
⚠ Only the interfaces used by the EVK-ODIN-W2 are described here.
1.5.3.1 CAN
The CAN bus is compliant with the 2.0A and B (active) specifications with a bitrate of up to 1 Mbit/s.
They can receive and transmit standard frames with 11-bit identifiers and extended frames with 29-
bit identifiers. Each CAN has three transmit mailboxes; two receive FIFOS with 3 stages and 28
shared scalable filter banks (you can use all of them even though you use only one CAN). 256 bytes of
SRAM are allocated for each CAN.
An external transceiver is needed to connect the ODIN-W2 series module to a CAN bus.
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