Xilinx SP701 User Manual

Figure 9: SP701 Dual Ethernet
DP83867IR
10/100/1000
PHY
RJ45 &
Mag
Spartan-7
FPGA
DP83867IR
10/100/1000
PHY
RJ45 &
Mag
RGMII
MDIO
25 MHz
Crystal
RGMII
MDIO
MII
MII
32 Kb
EEPROM
For EtherCAT
I2C
25 MHz
Crystal
X22792-050319
The SP701 evaluaon board uses dual TI PHY device DP83867IRPAP (U14, U16) for Ethernet
communicaons at 10 Mb/s, 100 Mb/s, or 1000 Mb/s. The board only supports the RGMII
mode. Each PHY connects to a user-provided Ethernet cable through RJ-45 connector (J9, J11),
Wurth 7499111221A with built-in magnecs, and status LEDs. On power-up, or on reset, the
PHY are congured to operate in the RGMII mode with the PHY addresses set by hardware strap
sengs:
• PHY1 U14 PHY_ADDR[4:0] = 0001
• PHY2 U16 PHY_ADDR[4:0] = 0010
The TI DP83867IRPAP data sheet is on the Texas Instruments website.
The Ethernet PHY components have their own JTAG chain connected to 2x5 male pin header
J10 as shown in the following gure.
Chapter 3: Board Component Descriptions
UG1319 (v1.0) July 12, 2019 www.xilinx.com
SP701 Board User Guide 24
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Xilinx SP701 Specifications

General

Brand	Xilinx
Model	SP701
Category	Motherboard
Language	English