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Xilinx SP701 User Manual

Xilinx SP701
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Figure 13: HDMI Output Interface
30E
ADV7511
HDMI Transmitter
HDMI_R_D[23:0]
30E
HDMI_D[23:0]
HDMI_HSYNC
HDMI_VSYNC
HDMI_CLK
I2C_SCL_HDMI
I2C_SDA_HDMI
HDMI_INT
HDMI_DE
HDMI_SPDIF
887E
R_EXT
D[23:8]
HSYNC
VSYNC
CLK
INT
DE
SPDIF
SCL
SDA
D[35:24],D[7:0]
HDMI Conn
HDMIOUT_D0_P/N
HDMIOUT_D1_P/N
HDMIOUT_D2_P/N
HDMIOUT_CLK_P/N
I2C_SCL_HDMIDDC
I2C_SDA_HDMIDDC
TMDS_D0_+/ -
TMDS_D1_+/ -
TMDS_D2_+/ -
TMDS_C_+/ -
SCL
SDA
HEAC+
HEAC-
CEC
50E
1.8V
HPD
CEC
CEC_CLK
HDMI_CEC
HDMI_CEC_CLK
HDMI_HEAC_P
HDMI_HEAC_N
HEAC_N
HEAC_P
DDC_SDA
DDC_SCL
TxC_P/N
Tx2_P/N
Tx1_P/N
Tx0_P/N
AVDD
1.8V for TMDS Output
DVDD
1.8V for Digital/IO
PVDD
1.8V for Digital PLL
PLVDD
1.8V for Analog PLL
BGVDD
1.8V
MVDD
3.3V
2.5V
25E
Spartan-7 FPGA
(Master)
50E
SIT8102
12 MHz
50ppm
X22795-052919
For more details, see the ADV7511KSTZ-P data sheet at the Analog Devices website. The
detailed FPGA connecons for the feature described in this secon are documented in the
SP701 board XDC le, referenced in Appendix B: Xilinx Design Constraints.
MIPI-CSI and MIPI-DSI
[Figure 2, callout 10, 11]
The mobile industry processor interface (MIPI) is a serial communicaon interface specicaon
promoted by the MIPI Alliance. An FPGA MIPI implementaon provides a standard connecon
medium for cameras and displays referred to as a camera serial interface (CSI) or a display serial
interface (DSI). Both interface standards use the PHY specicaon known as D-PHY. The D-PHY
specicaon provides a exible, low-cost, high-speed serial interface soluon for communicaon
interconnecon between components inside mobile devices.
FPGAs do not have I/O standards that can navely support D-PHY. Connecng MINI-equipped
camera and display components requires implemenng the D-PHY hardware specicaon with
discrete components outside the FPGA.
See the D-PHY Soluons (XAPP894) applicaon note for more informaon about:
MIPI-CSI (input) scalable low-voltage signaling (SLVS) condioning to FPGA LVDS25.
MIPI-DSI (output) FPGA dierenal HSTL18 condioning to SLVS.
Chapter 3: Board Component Descriptions
UG1319 (v1.0) July 12, 2019 www.xilinx.com
SP701 Board User Guide 29
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Xilinx SP701 Specifications

General IconGeneral
BrandXilinx
ModelSP701
CategoryMotherboard
LanguageEnglish

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