Xilinx VCU1525

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VCU1525 Acceleration Platform User Guide 53

UG1268 (v1.0) November 13, 2017 www.xilinx.com

Appendix A: Master Constraints File Listing

set_property PACKAGE_PIN BA32 [get_ports DDR4_C0_DQS_T12];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T12];

set_property PACKAGE_PIN AP31 [get_ports DDR4_C0_DQS_C13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_C13];

set_property PACKAGE_PIN AP30 [get_ports DDR4_C0_DQS_T13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T13];

set_property PACKAGE_PIN AT30 [get_ports DDR4_C0_DQS_C14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_C14];

set_property PACKAGE_PIN AR30 [get_ports DDR4_C0_DQS_T14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T14];

set_property PACKAGE_PIN AY28 [get_ports DDR4_C0_DQS_C15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_C15];

set_property PACKAGE_PIN AY27 [get_ports DDR4_C0_DQS_T15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T15];

set_property PACKAGE_PIN BE32 [get_ports DDR4_C0_DQS_C16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_C16];

set_property PACKAGE_PIN BE31 [get_ports DDR4_C0_DQS_T16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T16];

set_property PACKAGE_PIN BF40 [get_ports DDR4_C0_DQS_C17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_C17];

set_property PACKAGE_PIN BF39 [get_ports DDR4_C0_DQS_T17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C0_DQS_T17];

# DDR4 C1 DIMM I/F

set_property PACKAGE_PIN AN24 [get_ports DDR4_C1_ADR0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR0];

set_property PACKAGE_PIN AT24 [get_ports DDR4_C1_ADR1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR1];

set_property PACKAGE_PIN AW24 [get_ports DDR4_C1_ADR2];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR2];

set_property PACKAGE_PIN AN26 [get_ports DDR4_C1_ADR3];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR3];

set_property PACKAGE_PIN AY22 [get_ports DDR4_C1_ADR4];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR4];

set_property PACKAGE_PIN AY23 [get_ports DDR4_C1_ADR5];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR5];

set_property PACKAGE_PIN AV24 [get_ports DDR4_C1_ADR6];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR6];

set_property PACKAGE_PIN BA22 [get_ports DDR4_C1_ADR7];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR7];

set_property PACKAGE_PIN AY25 [get_ports DDR4_C1_ADR8];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR8];

set_property PACKAGE_PIN BA23 [get_ports DDR4_C1_ADR9];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR9];

set_property PACKAGE_PIN AM26 [get_ports DDR4_C1_ADR10];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR10];

set_property PACKAGE_PIN BA25 [get_ports DDR4_C1_ADR11];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR11];

set_property PACKAGE_PIN BB22 [get_ports DDR4_C1_ADR12];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR12];

set_property PACKAGE_PIN AL24 [get_ports DDR4_C1_ADR13];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR13];

set_property PACKAGE_PIN AL25 [get_ports DDR4_C1_ADR14];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR14];

set_property PACKAGE_PIN AM25 [get_ports DDR4_C1_ADR15];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR15];

set_property PACKAGE_PIN AN23 [get_ports DDR4_C1_ADR16];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR16];

set_property PACKAGE_PIN AM24 [get_ports DDR4_C1_ADR17];

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