Xilinx VCU1525

To Next Page

To Previous Page

VCU1525 Acceleration Platform User Guide 54

UG1268 (v1.0) November 13, 2017 www.xilinx.com

Appendix A: Master Constraints File Listing

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ADR17];

set_property PACKAGE_PIN AU24 [get_ports DDR4_C1_BA0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_BA0];

set_property PACKAGE_PIN AP26 [get_ports DDR4_C1_BA1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_BA1];

set_property PACKAGE_PIN BC22 [get_ports DDR4_C1_BG0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_BG0];

set_property PACKAGE_PIN AW26 [get_ports DDR4_C1_BG1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_BG1];

set_property PACKAGE_PIN AU25 [get_ports DDR4_C1_CK_C0];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C1_CK_C0];

set_property PACKAGE_PIN AT25 [get_ports DDR4_C1_CK_T0];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C1_CK_T0];

set_property PACKAGE_PIN BB25 [get_ports DDR4_C1_CKE0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CKE0];

set_property PACKAGE_PIN AV26 [get_ports DDR4_C1_CK_C1];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C1_CK_C1];

set_property PACKAGE_PIN AU26 [get_ports DDR4_C1_CK_T1];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C1_CK_T1];

set_property PACKAGE_PIN BB24 [get_ports DDR4_C1_CKE1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CKE1];

set_property PACKAGE_PIN AT23 [get_ports DDR4_C1_PAR];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_PAR];

set_property PACKAGE_PIN AW25 [get_ports DDR4_C1_ACT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ACT_B];

set_property PACKAGE_PIN AY26 [get_ports DDR4_C1_ALERT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ALERT_B];

set_property PACKAGE_PIN AN18 [get_ports DDR4_C1_EVENT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_EVENT_B];

set_property PACKAGE_PIN AR17 [get_ports DDR4_C1_RESET_N];

set_property IOSTANDARD LVCMOS12 [get_ports DDR4_C1_RESET_N];

set_property PACKAGE_PIN AV23 [get_ports DDR4_C1_CS_B0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CS_B0];

set_property PACKAGE_PIN AP25 [get_ports DDR4_C1_CS_B1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CS_B1];

set_property PACKAGE_PIN AR23 [get_ports DDR4_C1_CS_B2];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CS_B2];

set_property PACKAGE_PIN AP23 [get_ports DDR4_C1_CS_B3];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_CS_B3];

set_property PACKAGE_PIN AW23 [get_ports DDR4_C1_ODT0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ODT0];

set_property PACKAGE_PIN AP24 [get_ports DDR4_C1_ODT1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C1_ODT1];

set_property PACKAGE_PIN BD9 [get_ports DDR4_C1_DQ0];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ0];

set_property PACKAGE_PIN BD7 [get_ports DDR4_C1_DQ1];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ1];

set_property PACKAGE_PIN BC7 [get_ports DDR4_C1_DQ2];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ2];

set_property PACKAGE_PIN BD8 [get_ports DDR4_C1_DQ3];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ3];

set_property PACKAGE_PIN BD10 [get_ports DDR4_C1_DQ4];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ4];

set_property PACKAGE_PIN BE10 [get_ports DDR4_C1_DQ5];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ5];

set_property PACKAGE_PIN BE7 [get_ports DDR4_C1_DQ6];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ6];

set_property PACKAGE_PIN BF7 [get_ports DDR4_C1_DQ7];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C1_DQ7];

Send Feedback

Main Page

Table of Contents

Related product manuals