Name: Xilinx VCU1525
Brand: Xilinx
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VCU1525 Acceleration Platform User Guide 59

UG1268 (v1.0) November 13, 2017 www.xilinx.com

Appendix A: Master Constraints File Listing

set_property PACKAGE_PIN H32 [get_ports DDR4_C2_ADR17];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ADR17];

set_property PACKAGE_PIN D33 [get_ports DDR4_C2_BA0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_BA0];

set_property PACKAGE_PIN B36 [get_ports DDR4_C2_BA1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_BA1];

set_property PACKAGE_PIN C31 [get_ports DDR4_C2_BG0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_BG0];

set_property PACKAGE_PIN J30 [get_ports DDR4_C2_BG1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_BG1];

set_property PACKAGE_PIN B34 [get_ports DDR4_C2_CK_C0];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C2_CK_C0];

set_property PACKAGE_PIN C34 [get_ports DDR4_C2_CK_T0];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C2_CK_T0];

set_property PACKAGE_PIN G30 [get_ports DDR4_C2_CKE0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CKE0];

set_property PACKAGE_PIN D35 [get_ports DDR4_C2_CK_C1];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C2_CK_C1];

set_property PACKAGE_PIN D34 [get_ports DDR4_C2_CK_T1];

set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports DDR4_C2_CK_T1];

set_property PACKAGE_PIN E30 [get_ports DDR4_C2_CKE1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CKE1];

set_property PACKAGE_PIN M29 [get_ports DDR4_C2_PAR];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_PAR];

set_property PACKAGE_PIN B31 [get_ports DDR4_C2_ACT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ACT_B];

set_property PACKAGE_PIN F30 [get_ports DDR4_C2_ALERT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ALERT_B];

set_property PACKAGE_PIN D40 [get_ports DDR4_C2_EVENT_B];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_EVENT_B];

set_property PACKAGE_PIN D36 [get_ports DDR4_C2_RESET_N];

set_property IOSTANDARD LVCMOS12 [get_ports DDR4_C2_RESET_N];

set_property PACKAGE_PIN B35 [get_ports DDR4_C2_CS_B0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CS_B0];

set_property PACKAGE_PIN J31 [get_ports DDR4_C2_CS_B1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CS_B1];

set_property PACKAGE_PIN L30 [get_ports DDR4_C2_CS_B2];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CS_B2];

set_property PACKAGE_PIN K31 [get_ports DDR4_C2_CS_B3];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_CS_B3];

set_property PACKAGE_PIN E33 [get_ports DDR4_C2_ODT0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ODT0];

set_property PACKAGE_PIN F34 [get_ports DDR4_C2_ODT1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C2_ODT1];

set_property PACKAGE_PIN R25 [get_ports DDR4_C2_DQ0];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ0];

set_property PACKAGE_PIN P25 [get_ports DDR4_C2_DQ1];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ1];

set_property PACKAGE_PIN M25 [get_ports DDR4_C2_DQ2];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ2];

set_property PACKAGE_PIN L25 [get_ports DDR4_C2_DQ3];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ3];

set_property PACKAGE_PIN P26 [get_ports DDR4_C2_DQ4];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ4];

set_property PACKAGE_PIN R26 [get_ports DDR4_C2_DQ5];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ5];

set_property PACKAGE_PIN N27 [get_ports DDR4_C2_DQ6];

set_property IOSTANDARD POD12_DCI [get_ports DDR4_C2_DQ6];

set_property PACKAGE_PIN N28 [get_ports DDR4_C2_DQ7];

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Brand	Xilinx
Model	VCU1525
Category	Microcontrollers
Language	English

Xilinx VCU1525 User Manual

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